EUSART Data is not showing as expected

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Hi,

I think we all missed change. Maybe even the OP.

Klaus
 

Following code work fine for me for external oscillator 20MHz

C:
// PIC18F45K80 Configuration Bit Settings

#define _XTAL_FREQ 20000000

// CONFIG1L
#pragma config RETEN = ON       // VREG Sleep Enable bit (Ultra low-power regulator is Enabled (Controlled by SRETEN bit))
#pragma config INTOSCSEL = LOW  // LF-INTOSC Low-power Enable bit (LF-INTOSC in Low-power mode during Sleep)
// SOSCSEL = No Setting
#pragma config XINST = OFF      // Extended Instruction Set (Disabled)

// CONFIG1H
#pragma config FOSC = HS2        //  HS oscillator (high power, 16 MHz-25 MHz
#pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = ON      // Power Up Timer (Enabled)
#pragma config BOREN = OFF      // Brown Out Detect (Disabled in hardware, SBOREN disabled)
#pragma config BORV = 0         // Brown-out Reset Voltage bits (3.0V)
#pragma config BORPWR = LOW     // BORMV Power level (BORMV set to low power level)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
#pragma config WDTPS = 1        // Watchdog Postscaler (1:1)

// CONFIG3H
#pragma config CANMX = PORTC    // ECAN Mux bit (ECAN TX and RX pins are located on RC6 and RC7, respectively)
#pragma config MSSPMSK = MSK5   // MSSP address masking (5 bit address masking mode)
#pragma config MCLRE = OFF      // Master Clear Enable (MCLR Disabled, RE3 Enabled)

// CONFIG4L
#pragma config STVREN = OFF     // Stack Overflow Reset (Disabled)
#pragma config BBSIZ = BB1K     // Boot Block Size (1K word Boot Block size)

// CONFIG5L
#pragma config CP0 = ON         // Code Protect 00800-01FFF (Enabled)
#pragma config CP1 = ON         // Code Protect 02000-03FFF (Enabled)
#pragma config CP2 = ON         // Code Protect 04000-05FFF (Enabled)
#pragma config CP3 = ON         // Code Protect 06000-07FFF (Enabled)

// CONFIG5H
#pragma config CPB = ON         // Code Protect Boot (Enabled)
#pragma config CPD = ON         // Data EE Read Protect (Enabled)

// CONFIG6L
#pragma config WRT0 = ON        // Table Write Protect 00800-01FFF (Enabled)
#pragma config WRT1 = ON        // Table Write Protect 02000-03FFF (Enabled)
#pragma config WRT2 = ON        // Table Write Protect 04000-05FFF (Enabled)
#pragma config WRT3 = ON        // Table Write Protect 06000-07FFF (Enabled)

// CONFIG6H
#pragma config WRTC = ON        // Config. Write Protect (Enabled)
#pragma config WRTB = ON        // Table Write Protect Boot (Enabled)
#pragma config WRTD = ON        // Data EE Write Protect (Enabled)

// CONFIG7L
#pragma config EBTR0 = ON       // Table Read Protect 00800-01FFF (Enabled)
#pragma config EBTR1 = ON       // Table Read Protect 02000-03FFF (Enabled)
#pragma config EBTR2 = ON       // Table Read Protect 04000-05FFF (Enabled)
#pragma config EBTR3 = ON       // Table Read Protect 06000-07FFF (Enabled)

// CONFIG7H
#pragma config EBTRB = ON       // Table Read Protect Boot (Enabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>


#define TRUE                  1


void Port_Initialized (void)
{
    ANCON0 = 0; // Set to digital port
    ANCON1 = 0; // Set to digital port
    CM1CON = 0; // Comparator off
    CM2CON = 0; // Comparator off
    ADCON0 = 0; // A/D conversion Disabled
    ADCON1 = 0; // A/D conversion Disabled
    ADCON2 = 0; // A/D conversion Disabled
    
    LATA =  0;
    LATB =  0;
    LATC =  0;
    LATD =  0;
    LATE =  0;
    
    TRISA = 0b0000000; // all are output, Unused
    TRISB = 0b0000000; // all are output, Unused
    TRISC = 0b0000000; // all are output, Unused
    TRISD = 0b0000000; //all are output, Unused
    TRISE = 0b0000000; // All are output, Unused
}

void send(char message)
{
    while(TXIF == 0 );  // Wait till the transmitter register becomes empty
    TXREG1 = message;
}
void string(char *p)
{
   while(*p != '\0') {
       __delay_ms(1);
     send(*p);   
     p++;
   }
}

void Uart_Initialized(void)
{
    //TXSTAx TRANSMIT STATUS AND CONTROL REGISTER
   TXSTA1bits.CSRC = 0; //: Don?t care.
   TXSTA1bits.TX9 = 0; //Selects 8-bit transmissionbit
   TXSTA1bits.TXEN = 1; // Transmit Enable
   TXSTA1bits.SYNC  = 0;   // Asynchronous mode
   TXSTA1bits.SENDB = 0;
   TXSTA1bits.BRGH =  1;   //  High speed mode
   TXSTA1bits.TX9D = 0;
   //RCSTAx: RECEIVE STATUS AND CONTROL REGISTER
   RCSTA1bits.SPEN  = 1 ;   //Serial port enabled
   RCSTA1bits.RX9 = 0; //Selects 8-bit reception
   RCSTA1bits.SREN  = 1 ;//Don?t care.
   RCSTA1bits.CREN  = 1 ;// Enables receiver
   RCSTA1bits.ADDEN = 0; //
   RCSTA1bits.FERR  = 0 ;// No framing error
   RCSTA1bits.OERR  = 1 ;   // Overrun error
   RCSTA1bits.RX9D   = 0 ;   //Selects 8-bit reception
  
    SPBRGH1 = 0;
    SPBRG1 = 129,
  
    INTCON = 0x00;
    PIR1 = 0x00;
    PIR2= 0x00;
    PIR3 = 0x00;
    PIR4 = 0x00;
    PIR5 = 0x00;
    PIE1 = 0x00;
    PIE2 = 0x00;
    PIE3 = 0x00;
    PIE4 = 0x00;
    PIE5 = 0x00;
    IPR1 = 0x00;
    IPR2 = 0x00;
    IPR3 = 0x00;
    IPR4 = 0x00;
    
}
void main(void)
{
   char message[]= {"Hello"};
   Port_Initialized ();
   Uart_Initialized ();
  
    while (1)
    {
     __delay_ms(1000);
     string(message);
    
    }
    
}
 

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