error during simulation in cadence

[prasadel06]

hi ...

i am sumulating the inverter in cadence virtuoso schematic ...
then i am getting the error ..
*Error* fprintf/sprintf: format spec. incompatible with data - nil

and it is the simlating is going on...but no waveform is coming..

please help me..
thank you..

 

[yylei]

setenv NetlistMode Analog

 

[yxo]

check variables and stimuli

 

[prasadel06]

hi...
i am not getting you ...can u give detailed solution...