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error during simulation in cadence

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prasadel06

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hi ...

i am sumulating the inverter in cadence virtuoso schematic ...
then i am getting the error ..
*Error* fprintf/sprintf: format spec. incompatible with data - nil

and it is the simlating is going on...but no waveform is coming..

please help me..
thank you..
 

yylei

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setenv NetlistMode Analog
 

prasadel06

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hi...
i am not getting you ...can u give detailed solution...
 

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