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erroe while doing PEX using calibre in 65nm technology

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nisha gupta

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Dear All
i have design a transconductance amplifier. done with layout of it.. cleared DRC and LVS and PEX. in PEX i m getting some warning. i m not able to understand those warning but because of these warning i m able to generate config view.
i m attaching the error file
 

Re: error while doing PEX using calibre in 65nm technology

Dear All
i have design a transconductance amplifier. done with layout of it.. cleared DRC and LVS and PEX. in PEX i m getting some warning. i m not able to understand those warning
i m attaching the file that shows warning
 

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  • pexerror.png
    pexerror.png
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