Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Equation that relates the settling time of charge pump PLL to the frequency tolerance

Status
Not open for further replies.

husseinadel

Full Member level 3
Joined
Jan 25, 2006
Messages
156
Helped
19
Reputation
38
Reaction score
6
Trophy points
1,298
Location
EGYPT,CAIRO
Activity points
2,647
AA
can anybody tell me an equation that relates the settling time of charge pump PLL
to the frequency tolerance reqired,,specially for type 2 ,3rd and 4th order PLL
thanks
 

Re: PLL design question

**broken link removed**
 

Re: PLL design question

Hi Friend,
Refer the book by BEST on phase locked loops or the one by by woolaver...both available for downloads from this forum...else contact me...
 

Re: PLL design question

Yes, and I would like a simple equation to predict what the stock market is going to do next week!

No such thing. PLL settling time is a non-linear event, and good estimates involve probablilities and tragectories. A wild guess relates settling time to control loop bandwidth, but you can be off by orders of magnitude with that guess.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top