epitaxial layer and latch up

[deepak242003]

epitaxial layer

do anybody know how epi layer reduces latchup....

any related document will also help.

 

[erikl]

why use epi layer

do anybody know how epi layer reduces latchup....

any related document will also help.

See e.g. Allen/Holberg book, p.22 (below).
The heavily doped wafer substrate (below the lightly doped epi layer) reduces the p-bulk resistance, and thus reduces the B-E resistance of the parasitic npn transistor of an NMOS/PMOS transistor pair, which means a higher current must flow through it in order to forward bias the B-E-region of this transistor (which then could trigger latch-up in combination with the parasitic pnp transistor of the PMOS, if their current-gain-product gets > 1), s. Allen/Holberg book, p.41 (below).

 

[deepak242003]

epitaxial layer latch up

In that case what is teh use of epi layer.. we can directly increase teh doping of substrate.......cant we?... waht u think ?

 

[erikl]

You can't get the necessary reverse voltage (Vds, Vce) from a highly doped substrate. Semiconductor basics!