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epi and non-epi wafer

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surreyian

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non epi

when do we choose to use epi and non-epi wafer?
 

non-epitaxial wafer

if I remembered correct, the EPI wafer is more expensive, while it will have better performance than the non-epi wafer in some fields, such as preventing latch up

Added after 8 seconds:

if I remembered correct, the EPI wafer is more expensive, while it will have better performance than the non-epi wafer in some fields, such as preventing latch up
 

epi non-epi

I remember there is bulk and epi wafer.

bulk wafer: often choose for CMOS analog design for large body resistance. the large body resistance is good for noise reduction.

epi wafer: often choose for digital design. it is good for reduce the latch-up and for high speed digital circuit.
 

non-epi wafer is actually wafer substrate, epi wafer is epi growth on wafer substrate, it is easily to understand.
 

Epi layer essentially reduces the 'substrate' resistance. this is good for many things, latch up prevention in noisy environments(radiation hardening) as well as noise reduction and providing better matching of device biasing ( since the voltage at one point along the 2 dimensional plane will be closer to that of other points within the plane, this is in regards to nfets body and source ties to ground / substrate)in my design group we use epi for every design as well as deep nwell or nburied layer for better isolation. but these drive up wafer costs.
 

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