Hi!
For interconnect:
Search for codes with min. transition between 0 and 1.
Clock IC with half data rate and double inside IC
or work with both rise and fall edges (for example CoolRunner have
dual-edge FF`s)
Hi Victor,
Thanks for your reply.
Yes in fact I'm searching for encoding/decoding techniques to reduce data swiching activities, the firts solution you mensionned. Have you an idea ?
"Clock IC with half data rate and double inside IC":
I didn't get this can you eloborate this. What do you mean.
Dual edge sensitive devices are a good solution for HS and I do not see how wil them reduce power while sending data.