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ENC28J60 + MSP430 SPI communication issue

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prabakaran.s

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Hi I'm using ENC28j60 Chip. i communicate this chip Via MSP430F2272 controller ( SPI protocol).But i can't read the ENC28j60 Registers.

My write Code:

P3OUT &= ~ETH_CS; //Pull the STE low
while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission
UCB0TXBUF = u8ETHRegAddr; //Transmit address
while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission
UCB0TXBUF = pu8spiETHTxData; //Transmit data
while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission
P3OUT |= ETH_CS; //Pull the STE high

My Read Code:
P3OUT &= ~ETH_CS;


u8ETHRegAddr &= 0x3F; //Reset MSB for Read operation
while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission
UCB0TXBUF = u8ETHRegAddr; //Transmit data to configuratiuon register
while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission


for(u8delay = 0; u8delay < 15; u8delay++);

for(u8index = 0; u8index < u8ETHRxDataLen; u8index++)
{


// UCB0TXBUF = 0x00; //Transmit dummy data
// while(!(UCB0IFG & ETH_TXIFG)); //Wait to make a transmission
gau8ETHRxBuf = UCB0RXBUF; //copy data from SPI Rx buffer
while(!(UCB0IFG & ETH_RXIFG)); //Wait to receive a data
gau8ETHRxBuf = UCB0RXBUF; //copy data from SPI Rx buffer



I have problem in reading the register.
Thank
 

hai probakar...

have you done the clock phase and polarity configuration properly as per the slave? Please try to verify the bus using oscilloscope..

I have not used ENC28J60.. but i have worked on SPI. So if u confirm the clock, CS\ and data using scope, i think some of the possibilities we can isolate
 

Hi karthikkrv85


i check clock phase and polarity configuration as per the slave(Enc28j60) with oscilloscope..

The clock & CS pin porting configuration is normal. But still I can’t read r write in ENC28j60 Chip
 

Can u send the circuit diagram and if possible capture the SPI signal from scope...

---------- Post added at 14:15 ---------- Previous post was at 13:45 ----------

Please visit to this address too

MSP430F2272 - SPI: no reset of UCB0TXIFG after writing data to UCB0TXBUF - MSP430 Ultra-Low Power 16-bit Microcontroller Forum - MSP430

---------- Post added at 14:28 ---------- Previous post was at 14:15 ----------

looks like u have to define the proper vector address for the interrupt.

I have used silab controllers. In some of variants, u have to select the proper SFR page otherwise those interrupts never occur. I think the same situation may be in your case too. U have to define the vector address

I hope you will understand when you visit the below pages..

I2C between MSP430F2272 and the Melexis mlx90614 - MSP430 Ultra-Low Power 16-bit Microcontroller Forum - MSP430
 

ENC 28j60 problem in transmitting packet

hi friends

i'm working on Ethernet ( ENC28j60) My host controller in MSP430f5438, any one can help me out for forming the TCP/IP layer's ..
also when i transmitting packet. the order of layer's ( like source ip & destination IP & MAC Add & data ).\

And also the ENC chip itself having register for configuring source MAC Add then what about IP, how can i configure the source IP Add for enc chip.
 

Hi karthikkrv85


long back too meet u , I done the communication b/w the ENC chip & My host controller ( Msp chip )

i'm working on Ethernet ( ENC28j60) My host controller in MSP430f5438, can help me out for forming the TCP/IP layer's ..
also when i transmitting packet. the order of layer's ( like source ip & destination IP & MAC Add & data ).\

And also the ENC chip itself having register for configuring source MAC Add then what about IP, how can i configure the source IP Add for enc chip.

---------- Post added at 06:38 ---------- Previous post was at 06:37 ----------

Hi karthikkrv85


long back too meet u , I done the communication b/w the ENC chip & My host controller ( Msp chip )

i'm working on Ethernet ( ENC28j60) My host controller in MSP430f5438, can help me out for forming the TCP/IP layer's ..
also when i transmitting packet. the order of layer's ( like source ip & destination IP & MAC Add & data ).\

And also the ENC chip itself having register for configuring source MAC Add then what about IP, how can i configure the source IP Add for enc chip.
 

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