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I found a paper from TI that focuses on differential mode noise and filtering for buck converters.
I came up with 3.3uF 10uH 15uF. The paper assumes the filter will connect directly to the input capacitor of the converter, however in my case there is a bridge rectifier feeding the simple switcher. Should the damping capacitor be moved to to the DC side of the bridge?
These types of **broken link removed** can only be accomplished accurately with the aid of an FRA (Frequency Response Analyzer). You will typically measure the variation in the input current against that of a perturbation signal injected into the input. From this, you can calculate/plot the input impedance over some frequency span.
I posted another question in this forum regarding 60Hz ripple on the input to a SMPS, it would be great if you could share your expertise regarding that question. Assuming for a moment the SMPS can deal with the large input ripple, it does raise another point in that a large bulk capacitor directly after the bridge would now be in parallel with the capacitor that forms the EMC filter shown above. This simple little circuit is not so simple.
I'm starting to get a better feel for this. I ran a few simulations and this is what I observed:
First simulation is the response of the PI filter in the RECOM document with input and output as shown.
- Looks similar to image in post 7
- fr at about 4kHz
- ESR of C2 has very significant effect on the Q of the LC. makes we wonder if its not wise to add a small value resistor in series with Cd to allow for control of Q just in case stability issues arise?
2nd simulation is looking the other way, how much of the 370kHz noise from the converter makes it back out to the line?
- the filter seems quite effective >50dB @ 370kHz
- The value of C1 is interesting:
- if too small say 3uF the resonant peak starts to grow significantly and fr shifts up slightly
- if large the peak disappears, and the resonant peak shifts down slightly.
- so it appears a large input capacitor (C1) is both good for stability and EMC reduction
1) Does this sound correct, or am I out in left field again?
2) If I have two of these SMPS both running at about 350kHz, is there any reason I can't feed both from one filter? I'm mostly concerned with impact on stability of the SMPS's.
You will only know if your assumptions and modeling are correct by verifying performance in the lab. Sometimes we see results that we never expected. Often the L in the filter will be damped by placing a resistor in parallel to reduce the Q.
I need to add a large 470uF or so capacitor between the bridge and the input to this filter to smooth out the dips from the incoming 120Hz. I don't see any reason why I can't eliminate the 3.3uF capacitor in the original filter, do you agree?