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Elastic buffer design

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gold_kiss

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elastic buffer

Hi,
What are elastic buffers, how can i design an elastic buffer?
Thanks,
Gold_kiss
 

zyphor

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elastic buffer design

elastic buffer is the fifo which is used to adapt frequency different between two clock domains. It has two watermarks, one is high level water mark, the other is low watermark. When the cotents reach high mark, it backpressues the source of data, and when the contents reach low mark, it request more data from the source .
 

sarath51

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what is elastic fifo

Elasic buffer now are generally designed at PHY layer for many Serial protocol implementations. This will be useful , when two deivices linked up with a serial interconnect are operating with an offset in their frequencies . Implementaion wise similar to a Asnchronous FIFO design with a capabitilty to monitor the offset in the fequnecies at both the ends.
 

metalwave

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elastic buffer design

The Elastic Buffer operates as an asynchronous FIFO. It converts the data coming into the Receiver in the receiver clock domain to the System Clock domain. The Elastic Buffer also performs Clock colerance Compensation. It compensates for
difference in frequencies between the recovered clock (WClk) and the system clock (RClk).

Added after 10 minutes:

As to implementation, you can insert unsued data ,such as 'SKIP' in your income bits stream, when the wclk is faster than rclk, the data in async FIFO will be accumulated more and more. So when you find the incoming data is 'SKIP', you can discard it , that is to say stopping wptr for one cycle. If wclk is slower than rclk, the accont of data in FIFO will decreased, when the account decreases to some limit, insert 'SKIP' on the rx side. Thus balance the frequence difference.
 

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