Efficiency calculation in Envelope Modulator

[Politecnico]

Hi guys

I have designed an Envelope Modulator (with Discrete components), including a couple of op-amps, FETs, comparator, ....
Could anyone please help me how to calculate the overall efficiency of the design?
(You may say it is the Pout divided by Pdc, but the question could be how to calculate Pdc while there are many dc sources in the design. Should I calculate Pdc separately for each IC?)

Besides, the design is in Cadence Virtuoso. Is there any possibility to analyse the efficiency in the design environment?

Thanks a lot, in advance.

 

[FvM]

The question refers back to your efficiency definition...
It should be easy to determine a total Pdc value by simply summing the output power of all DC sources.