E1&Ethernet Bridge IC

[my_garden]

8051 eithernet board

This an interesting job.
Just like you said. The difficulty is to unpack the ip data, and rejust its speed. For E1 port it is easy to do.
Try it

 

[cdcll]

ethernet bridge ic price

RC7221 from Raycom(www.raycom.com.cn) is suitable for E1 & 10/100M ethernet bridge design, and it supports Nx64KB/s.

 

[wzdreamer]

I can't understand why you think about IP...
device must process only on data layer - i.e. ethernet frames for example...
The protocols from upper layers will correct data loss and other errors..

Hyp

 

[my_garden]

Hi wzdreamer
I think if we can unpack the ip package, it can work more more economic. For one E1 to transmit one 10 baseT it is important.
I now also do one job for E1 on ethernet design. I fell this job is easy to do. And in this project, we unpack the ip package.

 

[papyaki]

I think in this case, the E1 will act as frame relay with one hyperchannel, that means with an aggregation of n timeslots (1<=n<=31).
The throughput management is done by the end to end equipment at the IP level.

 

[zoovy]

Ethernet to E1 converter

I think the simplest solution would be to break this problem into manageable chunks.
1) you need an ethernet device to handle the Ethernet packets. The simplest solution here would be an ethernet switch. This approach solves all the issues of buffering, forwarding, blocking etc.
2) you need a mechanism to interface with E1 including standard framing. An E1 LIU+Framer IC from masny manufacturers would do the job. An example would be DS2148 from MAXIM.
3) You also need a mechanism to connect the Ethernet device to the E1 device. This would be a simple FPGA or a processor.

Here is my 2 cents worth advice.

If I were you, I would go and get an Ethernet switch with MII ports+built-in PHY. Example would be Kendin 3 port switch with MII +PHY or Marvell 5 port switch with MII+Phy. Price would be below $15.
Second would be a device from MAXIM DS2148 or derivative. <$15
Last you would need an FPGA. <$20

After all that, there is a little bit of work needs to be done.

The MII interface of a switch is an interesting one. It is 4 bit parallel data with clock and enable signals.
The E1 on the other hand is a serial interface.
The FPGA needs to mark the beginning and the ned of the ethernet packets to be able to send the data across the E1. One common approach is packetizing the whole thing in HDLC. However there are other approaches to the problem.


The problem that needs to be resolved in FPGA, needs to be resolved no matter what.

If you are interested in more about the software solution pm me. I just don't have time at the moment to type more.

Zoovy

 

[dainis]

Re: Ethernet to E1 converter

It is more easy:
1) for up to 10 Mbit HDLC or E1 channel use
Samsung ARM core System on Chip (SoC) S3C4530A 16/32-bit RISC microcontroller
is a cost-effective, high-performance microcontroller solution for Ethernet-based systems. An integrated Ethernet controller, the S3C4530A, is designed for use in managed communication hubs and routers.
Important peripheral functions include two HDLC channels with buffer descriptor, two UART channels with full modem interface signal and 32byte buffer, 2-channel GDMA, two 32-bit timers, and 26 programmable I/O ports. On-board logic includes an interrupt controller, DRAM/ SDRAM controller, and a controller for ROM/SRAM and flash memory.

It price is about 15 $ USD, add SDRAm and FLASH and E1 framer if nead it.

h**p://www.ucrouter.ru/english/index.html
h**p://lea.hamradio.si/~s57mmk/s5linbox.htm

2)For HDLC (WAN) speeds up to 45 Mbit
Redux PrimaGate® RS-120 or AptaGate® RX-100 , a 100 Mbps wire-speed Ethernet bridge.
h**p://w*w.reduxcom.com

 

[zoovy]

Re: Ethernet to E1 converter

It is more easy:
1) for up to 10 Mbit HDLC or E1 channel use
Samsung ARM core System on Chip (SoC) S3C4530A 16/32-bit RISC microcontroller

--snip-----X-----------------

dainis,
I am sure it is a good solution. The only thing I am thinking is that, I have been burned enough times by choosing a leading-edge(reread as bleeding edge!!!) product and having to redesign it because for some reason company decided to not make it anymore. After so many years, I became extremely lazy. I don't want to redo a project I did sometime ago.

Especially after market crash, we had a slew of redesigns because of companies buying each other, new CEOs seeing bigger pies somewhere else etc.

My question would be to ask Samsung reps to find out where this device is used, what the expected lifetime of the device is etc. If it is designed for (I am just making up now) for automotive industry such as airbags etc. then you are safe at least for 15 years! If they are making of a cellphone, check if the device is available in a year or not. Don't get me wrong. I am not saying that Samsung will drop it. I am just saying that choosing something should not be taken lightly.

My question to you would be "do you use this device? How long? What is your expected product life-cycle? ".

If you are looking for that type of solution with a lot of software development/investment, I can recommend 2 safe bets that are entering into the market.
1) IDT came up with RC32355 Integrated Communications Processor. It has E1/T1, Ethernet,ATM ports with similar generic interfaces for memory,flash. Pricing is ~$20 for qty 1K. The design is for ADSL market. It runs linux and they provide basic drivers for onboard peripherals. If you want time to market advantage, you can purchase dev. kit for a third-party(I can't recall their name now).

2) Infineon came up with a similar device called Easyport. They bundle all of the code with it. You pay $20K licensing for the code and no royalties. This processor has an additional voice-coprocessor.

Both of these products are targeted to be available long time especially in IDT case.

Zoovy

 

[zoovy]

You are right

Redux PrimaGate® RS-120 has sync HDLC port and you may use any external Line interface unit (LIU) and E1 (G.704) framer,
if you need fractional E1 interface.
PrimaGate® RS-120 is for direct raplacement for Rads ChipBridge RJ-17.
If you need more powerfull and programmeble chip, look Redux AptaGate® RX-100 chip, it contains internal Time Slot Assigner (TSA).

dainis,
Sorry that I hadn't checked this company in detail but you are right. The redux PrimaGate RS-120 seems to be the simplest solution. This is really a direct replacement for the RAD RJ-017.

Zoovy

 

[dainis]

Re: You are right

Redux have (ask it for this) Application Note #3
"Upgrading from the ChipBridge RJ-017 to the PrimaGate RS-120"

Differences:
1) PrimaGate RS-120 using SDRAM, instead RJ-017 DRAM (what stay obsolute)
2) PrimaGate have 100M/10M Ethernet and it nead external PHY chip (LXT972)
3) PrimaGate nead 25MHz clock, RJ-017 40MHz.

4) When adding external FLASH, PrimaGate RS-120 have possibility
to software upgrade.

 

[wzdreamer]

dainis was fall in love with ARMs )) Great

 

[dainis]

After Intel x86 (PC & Am186ED )and MIPS (ChipRouter RJ-018) ....

 

[wzdreamer]

)))

 

[dainis]

That I love in ARM SOICs, is that it have JTAG debug interface,
that allow onboard FLASH programming, software debuging, board hardware (include SDRAM, FLASH, interfaces (LCD, KEYpad, LEDs)) testing and diagnostics ....

 

[cactus_studio]

Unpack Ip ?

Hi my_garden:
You said, for one E1 to transmit one 10 baseT it is important not only processinng ethernet frames but also processing IP Packets. But I wander how you can accomodate 10 baseT signal only in one E1? Is that possible?
Although I know in processing Etherenet frames and then IP packets , we can reduce the Ethernet frame length dramatically. But is that true, 10 BaseT in only ONE E1 ?
Can you give me some detailed analysises ?
Many thanks.


cactus_studio

 

[zoovy]

Re: Unpack Ip ?

Hi my_garden:
You said, for one E1 to transmit one 10 baseT it is important not only processinng ethernet frames but also processing IP Packets. But I wander how you can accomodate 10 baseT signal only in one E1? Is that possible?
Although I know in processing Etherenet frames and then IP packets , we can reduce the Ethernet frame length dramatically. But is that true, 10 BaseT in only ONE E1 ?
Can you give me some detailed analysises ?
Many thanks.


cactus_studio

Soory to interject. The seemingly difficult task you are talking about issending 10/100 Mbps through E1. This is actually not quite the way it looks. In fact most of the switches do the same.

In ethernet world, the flow is controlled eeither directly or indirectly.
Direct control is via Flow-control mechanisms (collusions in half-duplex and flow-control packets in full-duplex.)
In the indirect control, the packets are dropped randomly (names of the algorithm is RED or random early detection, and WRED which is wieghted RED). The upper layer (mainly TCP) handles and controls the bandwidth via TCP windows etc.

In short Ethernet over E1/T1 carries only E1/T1 rate ethernet data and the switch(PrimaGate) signals clients to send less or more data depending on the load.

 

[wzdreamer]

>>> After Intel x86 (PC & Am186ED )and MIPS (ChipRouter RJ-018) ....

dainis
You have more than 1 love? )))
I too, but don't speak about this, coz there are jealous ppl )))

 

[ecse]

hi,hope this website may be of help

If you can read Chinese, go and have a look at http://www.raycom.com.cn/product/product.htm[/url]

RC7210 is the right thing you want. Also you can contact with me, we have finished the FPGA design of 10M ethernet to 1-5 E1 Mapper and 10M ethernet to 1E1 Mapper.

 

[papyaki]

Hi

Here is maybe something interresting.

**broken link removed**

 

[dainis]

New chip from REDUX:
The StelaGate RS-160 is a single chip solution for point-to-point tunneling of unstructured E1/T1/J1 over Ethernet-based and HDLC-based packet links.
The RS-160 provides:
Packetization of an E1/T1/J1 circuit transparent to the TDM signaling
Transmission of packetized E1/T1/J1 over any 10/100 Ethernet link or HDLC packet service link
On-chip clock recovery
Packet re-ordering
Bridging and multiplexing of 10/100 Ethernet together with packetized TDM circuit over packet service link


The RS-160 is used by OEMs in:
DSL First Mile and campus devices
Fiber termination units
Point-to-point fixed wireless devices
Metro Ethernet network edge routers

The StelaGate RS-160 provides OEMs with the following key values:
Rapid time to market with drop-in E1/T1/J1 solution
Simple and cost-effective alternative to Voice over IP
No software development
No CPU required
Wire-speed bridging and forwarding of multiplexed Ethernet traffic