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Dual Core - regarding instruction cache

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vivek_p

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Dual Core

In the case of Dual Core processor how does the two cores know which instruction to take up from the Instruction cache (Dont bother about the implementation of a single core- supercalar, VLIW , multithreading etc).............Is there any specific hardware routing logic? Or is it software routing?

What if the two cores are inter-dependent on a particular data? Do both the cores share a single Data Cache or do they have two separate Data Caches..........Is there any inter processor interrupt. If there then how does it occur.....

I am mainly interested to know the architectural level implementation.....
 

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