melkord
Full Member level 2
I have 1 NAND that need to drive 32 NORs and am using the available standard cells.
i am not sure with theShould I use larger NAND available in the library or design a buffer (even-numbered INV in series with increasing size)?
I think I should use buffer but the design example that I have uses 1 NAND with unknown fanout capability.
Please excuse me with this basic question.
If I need to post it in the Digital thread instead, please let me know.
From a quick reading, I got that using larger gate increase the input cap that must be driven by the previous circuit obviously.
I still would like to hear some suggestions.
i am not sure with theShould I use larger NAND available in the library or design a buffer (even-numbered INV in series with increasing size)?
I think I should use buffer but the design example that I have uses 1 NAND with unknown fanout capability.
Please excuse me with this basic question.
If I need to post it in the Digital thread instead, please let me know.
--- Updated ---
From a quick reading, I got that using larger gate increase the input cap that must be driven by the previous circuit obviously.
I still would like to hear some suggestions.
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