Hi everybody,
I'm trying to simulate the circuit of 6kW multidevice interleaved boost conveter by using a silicon carbide mosfet's model of STM (SCT30N120). Unfortunately, I couldn't get right results. I am getting 260V when I should have taken about 600V as the output voltage. I think there is a problem about driving the mosfets. I'm using pulse generators with the values are V1=0 V2=15 TD=0 TR=1ns TF=1ns PW= 7.5us PER=20us (I also added 10m resistances between the gate and pulse generator). I added the picture of circut and the datasheet of the mosfet. Could you tell me what is wrong?
With 60 ohm load (10A) you are asking a lot of
a 6:1 boost converter. My limited experience has
not been real successful at that step-up ratio.
You need to look at whether you can put the
requisite current into the inductors in the FET
"on time", and whether the "off" time suffices
for that energy to transfer to the load through
the rectifiers' series R.
Might begin with just one leg and see whether
L, on time and voltage make 2.5A worth of time
averaged current. Play with low duty and see
what a single pulse looks like, vs pulse width -
charging and discharging (in)efficiencies can
be tabulated and maybe the key loss term will
stand out.
Regarding driving SiC Mosfets:
* Driving the gate with -2V / +20V is recommended, but 0V/15V should work.
* Gate resistors of 1 Ohm up to 20 Ohm are recommended, but 10m should work in simulation.
Did you read the Application notes provided by the manufacturer?
Are you sure the 2 Mosfets 180° phase shifted on 1 inductor is a good solution? Maybe it is, but I've never seen it before.
With 60 ohm load (10A) you are asking a lot of
a 6:1 boost converter. My limited experience has
not been real successful at that step-up ratio.
You need to look at whether you can put the
requisite current into the inductors in the FET
"on time", and whether the "off" time suffices
for that energy to transfer to the load through
the rectifiers' series R.
Might begin with just one leg and see whether
L, on time and voltage make 2.5A worth of time
averaged current. Play with low duty and see
what a single pulse looks like, vs pulse width -
charging and discharging (in)efficiencies can
be tabulated and maybe the key loss term will
stand out.
Thanks for your reply. My ratio rate is not 6 but is 4. (Vin=150v and Vout should be 600v). Theoretically, duty cycle less than 0.5 seems sufficient for this circuit topology. To get 4:1, I'm using d=0.375 by the help of two parallel switches per channels. On your advice, I will try to observe the current values of the inductors.
Regarding driving SiC Mosfets:
* Driving the gate with -2V / +20V is recommended, but 0V/15V should work.
* Gate resistors of 1 Ohm up to 20 Ohm are recommended, but 10m should work in simulation.
Did you read the Application notes provided by the manufacturer?
Are you sure the 2 Mosfets 180° phase shifted on 1 inductor is a good solution? Maybe it is, but I've never seen it before.
My purpose is to get a high power density dc dc converter for electric vehicles. So, I use this topology that makes it possible to use smaller valued passive components. I referenced this article : https://ieeexplore.ieee.org/document/7054946