drc error in cadence--hot nwell

[rmadhukarthi]

hot nwell

hai,

i am getting DRC error as HOT NWELL while running drc for any circuit in cadence VIRTUOSO layout editor. how could i rectify this.

 

[hylas]

hot nwell drc error

DRC can't identify the nwell is hot or cold before pin assignment. So please label or add pins to supply connection before you do DRC. Usually nwell connected to "vdd" will be treated as cold nwell and you won't get warning.

 

[hung_wai_ming@hotmail.com]

cold nwell

Yes, check if your NWELL has connected to the highest potential or not. Label it in Cadence. Don't use Pin. Use Label as naming "VDD"

 

[vipin_vasudevan]

virtuoso hot nwell

Hii,

If the problem still exists then u do check the labells.whether its multilabeled or a soft connect with substrate markers.

rgds
Vipin

 

[asterixgr]

virtuoso hotnwell

the hot nwell error is due to the "layers " that you have been determine for the pins.
Offcourse the nwell must connected to the vdd! but the rectangle of the pin vdd! must be on METALx pn and the text(vdd!) must be on PIN (Mx) where x= the metal that you want to use.
This at least is working in my project.