Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

doubt supply-independent biasing

Status
Not open for further replies.

ffsher100

Junior Member level 3
Joined
Jun 16, 2011
Messages
27
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,486
i got a question from Razavi textbook in chapter 11.2 : Supply-Independent Biasing
66_1310439631.jpg
===><figure 1>
43_1310439631.jpg
===><figure 2>
by figure2, it looks like vdd really has no effect on the figure 1 CKT.

the textbook also introduce start-up circuit M5 into the design as following:
92_1310439888.gif
===><figure 3>
when simulating the circuit with startup(M5), it seem to be effected by VDD.
Current Iout, Iref vary with VDD.
In practice, figure 3 become Supply-dependent Biasing since startup must include.
how could this be? if using figure 3, supply- independent case never happen.

below figure, i sweep .dc vdd.

As you see vdd ramp from 0v to 5v, current Iref and Iout are not constant if vdd>2.8v
 
Last edited:

leo_o2

Advanced Member level 4
Joined
Sep 3, 2004
Messages
1,324
Helped
277
Reputation
556
Reaction score
241
Trophy points
1,343
Location
China
Activity points
5,761
Actually, start-up circuit in Fig.3 is poor.
Pls change to other start-up circuit like detecting mode.
 

leo_o2

Advanced Member level 4
Joined
Sep 3, 2004
Messages
1,324
Helped
277
Reputation
556
Reaction score
241
Trophy points
1,343
Location
China
Activity points
5,761
Use a current mirror to copy the bias current and compare it with a current generated by a resistor to create start-up signal. When bias current is big enough, the start-up current will be turned off completely.
 

ffsher100

Junior Member level 3
Joined
Jun 16, 2011
Messages
27
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,486
Hi leo_o2,

thank for you reply.
here, my original question is that the Vgs1,Iref,Iout...ect, in Figure 1 should not be affected by Vdd vary.
or my understand is wrong.
In above the fourth figure show current Iout, Iref vary with VDD.
I confuse....
 

dick_freebird

Advanced Member level 5
Joined
Mar 4, 2008
Messages
7,238
Helped
2,118
Reputation
4,240
Reaction score
1,971
Trophy points
1,393
Location
USA
Activity points
58,037
Think "supply independent over -some range of VDD-".
Not zero to breakdown, not even close. Just good
enough for the job (+/-__% for +/-10% VDD, like).

Startup conditions may not have the same accuracy
requirement as within-supply-spec-range, just function.
That's for you to determine, not assume. Unless you
like extra difficulty.
 

leo_o2

Advanced Member level 4
Joined
Sep 3, 2004
Messages
1,324
Helped
277
Reputation
556
Reaction score
241
Trophy points
1,343
Location
China
Activity points
5,761
If you use the start-up circuit I recommended, Iref will not vary with VDD.

Hi leo_o2,

thank for you reply.
here, my original question is that the Vgs1,Iref,Iout...ect, in Figure 1 should not be affected by Vdd vary.
or my understand is wrong.
In above the fourth figure show current Iout, Iref vary with VDD.
I confuse....
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top