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doubt on hspice declaration of pwl for multiple gates at atime

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cyrax747

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Hi

I am implementing the circuit which my friend is working on.My doubt is in the below diagram attached,there are inputs from IN1...IN N number of inputs,how to delcare the input PWL waveform for each of them say n=64,should i declare 64 times for each of the gate or else any short cut we have ,plz help.
 

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