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doubt on FET characteristics

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sita

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hi.

I have a doubt on what's the reason for a small slope in saturation region of drain current v/s. drain-source voltage after the MOSFET attains pinch-off.

If you have any good books describing this interesting MOSFET internal actions, please do share.

Thanks,
sita
 

Hi Friend,

There are many books for this. Refer
* Electronic Devices and Circuit Theory - Nashelsky and Boylestad
* Electronic Devices and Circuits - David A. Bell
* Electronic Devices - Salivahanan
* Electronic Devices - Macmillan & Halkias


Regards,
Avinash.S.
 

in the equation for current you can see Length(L) in the denominator.... when pinch off is reached the length slowly starts decreasing which compensates for the increase in Vgs and hence a slow slope is obtained...
 

sita said:
hi.

I have a doubt on what's the reason for a small slope in saturation region of drain current v/s. drain-source voltage after the MOSFET attains pinch-off.

Do you mean MOSFET operation below threshold ? This is typical for log domain applications (logarithmic law instead of quadratic behaviour).
 

Hi,

At saturation, FET will have nearly constant and maximum current and current merely increases with VDS. But with the influence of Channel Length modulation λ, there is influence of r0≈(1/λIsat) which will lead to a slope.

regds,
anup
 

octocreation said:
Hi,
..... But with the influence of Channel Length modulation λ, there is influence of r0≈(1/λIsat) which will lead to a slope.

This effect is quite similar to the EARLY effect for BJT´s.
 

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