Double rate registor for DQ and DQS DDR in SDRAM controller ?

[k621219]

ASIC Double rate register for DQ and DQS DDR in SDRAM controller ?

I am developing DDR2 SDRAM controller.
In FPGA, I used a double rate register.
In ASIC, What kind of logic do I need to use for double rate register?

 

[qieda]

Hi,

I think for DDR input you need to use a posedge and a negedge flipflop
For the ouput you need to multiplexer two flip flip outputs. The multiplexer is controled by your clock

regards