doing fixed point multiplication correctly in vhdl

[sweethomela8]

Hi I want to multiply a 12 bit fixed point (1QN format CORDIC format). sign bit, integer bit, and 10 fractional bits, with another integer value. say decimal 360.

What needs to be done to do the multiplication correctly and still prevent overflow and misinterpretation of the result?

Thanks.

Added after 32 minutes:

For example...say I want to multiply 1.5 by 360..

+1.5 = 01.1000000000
to multiply it by 360 (unsigned 0101101000),

can I just multiply it directly?

Do i have to represent 360 in that same 1QN format?

in other words..

0101101000.0000000000 and then sign extend +1.5 to
0000000001.1000000000?

thanks.

 

[vipinlal]

What you can do is:
1)convert the 1QN format to 2's complement number first.
2)Multiply the converted number by the constant(which is +ve for you).
3)Make sure that the resultant register should have 12+number of bits in the constant number in binary form = 12+9=21 bits..
4)Now 21st bit indicates the sign.The whole number is stored in 2's complement format.So you need a reconversion to 1QN format if you want.
5)The bits 1st to 10th are the fraction.
6)You can truncate the extra bits if you want depending upon the precision you want.


--vipin
https://vhdlguru.blogspot.com/

 

[TrickyDicky]

VHDL has new fixed point libraries, that makes fixed point maths much easier to understand and follow.

you can do things like this:

signal small_num : sfixed(1 downto -10); --2 integer bits (1 is sign bit), 10 fractional bits
signal large_num : sfixed(9 downto 0);
signal result : sfixed(11 downto -10);

.......
--then somewhere in your code:
result <= small_num * large_num;

All bit positions are taken care of for you. It is so much better to read than using the numeric_std library and tracking all of your fractional bits.

The libraries are part of the 2008 standard of VHDL. But until vendors get their arse in gear, you can get '93 compatible versions from here: **broken link removed**

 

[vipinlal]

Yeah, numeric_std is a good option.But before moving forward try to synthesis a simple program using numeric_std library. I used this library once in xilinx and it came out that they dont have synthesis support for it that time. Or may be I have done some mistake.

Some articles on numeric_std can be seen here:
https://vhdlguru.blogspot.com/search/label/Fixed Point Package

--vipin
https://vhdlguru.blogspot.com/

 

[TrickyDicky]

You have to bring in the '93 version (from my link above) as a file in your project, at least thats how to do it with Quartus.

Added after 2 minutes:

Yeah, numeric_std is a good option.But before moving forward try to synthesis a simple program using numeric_std library. I used this library once in xilinx and it came out that they dont have synthesis support for it that time. Or may be I have done some mistake.

Some articles on numeric_std can be seen here:
https://vhdlguru.blogspot.com/search/label/Fixed Point Package

--vipin
https://vhdlguru.blogspot.com/

You mean fixed_pkg, not numeric_std

 

[FvM]

Referring to the above suggestions, it should be clarified, that Xilinx 1QN fixed point format is alreday 2s complement.
So it's has not to be converted. It differs from a usual 2s complement signed integer only by a scale factor.

The question isn't clear however, because you don't specify an intended result format. Obviously 1.5 * 360 doesn't fit
the said 1Q10 fixed point format.

 

[vipinlal]

@TrickyDicky : Oh sorry, i just used numeric_std instead of fixed_pkg. sorry. thanks for noticing.