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[SOLVED] Does temperature variation affect SMPS control loops detrimentally?

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d123

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Hi,

I would never have thought that a) a discrete triangle wave without using a negative supply were so hard to get to be from anywhere near 0V to easier 1V. b) That a lot of triangles look like RC wave-shapes unless you sacrifice amplitude for neatness. c) That a temperature-stable 1V peak-to-peak triangle wave is very hard to make with comparators and op amps and pointless with transistors. XR2209 is min. 8V and 8038 is 10V, I have 3V.

Anyway, for a (SEPIC) voltage feedback control loop of error amplifier and comparator, using a triangle wave into the comparator, how much can triangle wave peak-to-peak voltage fluctuations with temperature affect the control loop? Could the DC-DC lose control of the regulation?

e.g. The 100kHz triangle wave:

-15C = 0.101V to 0.932V
+27C = 0.101V to 0.960V
+85C = 0.114V to 0.986V

Is that range of change likely to matter or is not important so long as the error amplifier is well-compensated?

- - - Updated - - -

Do peope who make 'discrete' triangle waves with e.g. a 555 and an LPF and similar generators accept rather curvy triangle waves as the straight-line neatness is not so necessary in reality?
 

Hi,

It depends on the circuit.

For example:
If you have a P-I regulation loop and an error amplifier with a stable reference voltage, then the triangle shape and offset is almost irrelevant.

Klaus
 
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    d123

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Hi Klaus,

Thanks. I need to check what PI(D) is in relation to type III compensation - which is what I've got on error amp and voltage reference is a TLV431. Good to know that wave shape and offset are minor issue as I get worked up about circuit changes of behaviour with ambient and enclosure temperature changes, so that's one worry less. At this rate, a decade from now I might be able to move onto pcb layout and a prototype...
 

I have favored triangle wave oscillators in my designs.
I use two comparators at Vdd/3, 2*Vdd/3 (ala the
NE555) because it's hard or impossible to get a clean
triangle wave all the way to the rail.

I use switched current sources / sinks, a "1X" always-on
and a "-2X" that toggles. The comparators drive S, R
inputs of a SRFF and the SRFF controls the "-2X" source.

At 1/3, 2/3 you could also go with a switched resistor
and tolerate the nonlinearity of the ramp.

Now when it comes to bipolar PWMs, temperature can
be an issue for timing - especially minimum on time,
minimum off time to avoid pulse skipping or runt
pulses. High temp saturation can really push out the
"clean pulse minimum" and if this is where you were
hoping to operate (say, at high line light load 125C)
you might find it impossible or ugly, to get the output
pulse you wanted.
 
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    d123

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any MLCC caps ( except C0G or NPO ) have a change in capacitance with temp - as do cheap resistors ...
 
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Hi,

Yes, and additionally MLCCs change capacitance with applied voltage, thus - even when driven with perfect constant current - the waveform will deviate from perfect triangle.

For best performance: use foil capacitors.

Klaus
 
Hi,

Thanks for input, guys.

I would like to try to copy your triangle wave generator set-up, many thanks for the explanation. BTW, the 6A pulse, 2A continuous BJT as switch was disappointing - it struggled to cope with circuit demands (~1.3A output) so changed it to a ~1.8VGS ON NMOS, and swapping diode for BJT or MOSFET wasn't going well so fell back on Schottky until circuits are definitely fully-functional and I know them well before possibly trying that again.

For timing capacitors I think in terms of (cheap) polystyrene in the hundreds of pF to nF range or polyphenyl sulfide in the nF range and try to keep capacitor value as small as possible. Resistors along lines of 'poor man's - cough, cough - "top quality"' = 1%, +-100ppm, thin or thick film...

If I can ask here, it's a simulation and/or what it might mean in real-world circuit question... Three SEPIC circuits, designed values calculated from An-1484 (SEPIC design app note).
Two are 3 to 3.7Vin and a) is 3V, 1A out and b) is 5.3V, 1.3A out - both with 390uH, 98mOhm, 3.1A idc inductors but 'b' should be ~25uH (calculated value is 382uH for 'a').
Third is 3 to 12Vin, 6V, 1.3A out, with 22uH inductors (calculated is 19.76uH)... Simulator 'hates' 22uH, 10mOhm, 9A idc inductors but works with randomly-chosen/invented 100uH, 45mOhm, 4.5A idc. At a guess, is that to do with higher peaks of inductor ripple causing a problem or something or a simulator quirk?
Are inductor values a matter of personal choice if low ripple is a design goal and very light loads might be seen (e.g. 10mA min to 1A max) or calculated design values need to be adhered to? I want to re-calculate with 100uH.
A quirk is e.g. simulator gives error when Vsupply is 3V and Vin is 3V but not if Vin is raised to 3.01V.
 

Hi,

I have favored triangle wave oscillators in my designs.
I use two comparators at Vdd/3, 2*Vdd/3 (ala the
NE555) because it's hard or impossible to get a clean
triangle wave all the way to the rail.

I use switched current sources / sinks, a "1X" always-on
and a "-2X" that toggles. The comparators drive S, R
inputs of a SRFF and the SRFF controls the "-2X" source.

... As can't locate current source/sink ICs in simulator, and LM334 only operates to 0C, had to make a model of a passable version of a real IC current source that does down to - 25C, so went for REF200 100uA source/sink - simulator won't show it on at - 25C yet temperature analysis shows - 25C to +85C with half a uA of variation across curve... And it dies when I put two in one block model of the IC plus the Wilson mirror, so have to accept one third of IC for now. It'll do, better than using an ideal current source.

Anyway, reason for reply, tried your version of triangle oscillator today, at last. In truth, I couldn't understand where to connect - 2X sink yet (or why it has to be double the source current), so for time being have it with 100uA constant source and NMOS sink driven by the FF instead. Despite my failings, that is a really, really nice circuit, starts up nicely, easy to modify and only 5mV max deviation at either end from 27C to 85C, super. Thank you very much.
 

Simulator 'hates' 22uH, 10mOhm, 9A idc inductors
....
A quirk is e.g. simulator gives error when Vsupply is 3V and Vin is 3V but not if Vin is raised to 3.01V.

I've also seen various quirks in a simulator. Occasionally changing something - just slightly - cures a frustrating error.

A component value, timestep value, adding a resistor in series, a resistor in parallel. There's no telling why. The algorithms keep it a secret.

After using the same simulator a long while you see this or that quirk a few times. You're less surprised at it. Try different things to get around it. If it's a popular simulator you might find the solution posted at a support forum.
 
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PI is a type II compensator. PID with two more poles is TypeIII.

How much voltage do you have? I made a custom 300khz modulator with a triangle using a transistor current source topology. But I had 10V and made a triangle between maybe 1-4V. The triangle was very good.
 
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Hi,

PI is a type II compensator. PID with two more poles is TypeIII.

Thanks. Looking at possibility of adding voltage feed-forward, as well, hopefully.

How much voltage do you have? I made a custom 300khz modulator with a triangle using a transistor current source topology. But I had 10V and made a triangle between maybe 1-4V. The triangle was very good.

...3V supply and supply - 2V on comparator input across temp range... - found rail-to-rail comparators but I think they were too slow so sticking with LM193/2903 and its meagre ICMR. Is it possible to know how you made it or see a schematic, unless it's private/professional stuff?
 

Hi,



Thanks. Looking at possibility of adding voltage feed-forward, as well, hopefully.



...3V supply and supply - 2V on comparator input across temp range... - found rail-to-rail comparators but I think they were too slow so sticking with LM193/2903 and its meagre ICMR. Is it possible to know how you made it or see a schematic, unless it's private/professional stuff?

It was the topology shown here but flipped upside down using a P instead of N.

https://youtu.be/eHGumuqh--Y

That charged a cap (cog/npo) and was reset with another transistor. There were a couple other tricks in it but that’s basically it.

It really needs some extra voltage to work well. Although one trick was to use a dual transistor pack and use the Vbe of one to cancel the Vbe variation that otherwise “gets into” the current set point. That helps it operate in a narrower range but 3V is too little I think.
 
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Hi,

Trying to do voltage feed-forward section of circuit. First version was triangle wave into NMOS gate, drain fed by divided down input voltage to SMPS/SEPIC, taking increased signal level from source resistor, but not sure like that approach or if valid design. Other idea is using non-inverting integrator fed by summer which sees the divided down Vin. Does the circuit look feasible as a voltage feed-forward stage? It's only a rough version, needs a lot more work to fine tune voltages. My reasoning is that PWM comparator will be off more at higher Vin and on more at lowest Vin.

Asking a "what could possibly go wrong with such a great idea?" ;) question. Thanks.

VOLTAGE FEED-FORWARD V3 INTEGRATOR V1.JPG
 

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