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Does Solid State Marx Generators actually work?

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Swend

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Pulse charging capacitor through diode - problems

Hi friends.

I am trying to pulse charge a few capacitors through diodes, here is the schematic below. Q3 and Q4 are both OFF in this test. C6 is the problem area.

load.png

Input pulse

SDS00191.PNG

Voltage across C4 with ref. to 0 (zero) everything is as expected.

SDS00192.PNG

Voltage across C6 with ref. to 0 (zero), now why can't this be like C4? the only difference between C4 and C6, is that when charging C6 there is an extra diode D3 in the charging path. If I short out D3, then C6 trace becomes exactly like C4. And I tried several other diodes, same problem.

SDS00190.PNG

I measured the voltage drop over D3, according to the datasheet the Vfm is 1.7V and I measured it to 410mV - so it never turns on, why?

SDS00197.PNG
 

Swend

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Re: Pulse charging capacitor through diode - problems

I did some further investigation, it seems to me it's a design error with that D3, see sim below. I had the feeling when I saw this design proposal in a IEEE paper, but then I doubted myself and went with the original proposal.

ltsim29.png

So I guess I have to use a MOSFET instead of a IGBT for Q3, unless someone here have experience with "pre-forward-biasing" a diode, and D3 can be forward-biased permanently for that matter doesn't have to be switched in any way.
 

crutschow

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Re: Pulse charging capacitor through diode - problems

You can't have only a diode in series with a capacitor.
Think about it.
Once the capacitor charges through the diode, there's no path for the discharge current.
 

Swend

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crutschow

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Re: Pulse charging capacitor through diode - problems

Well, your first circuit had diodes in series with some of the capacitors with no discharge path shown, and that won't work.
 

Swend

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Re: Pulse charging capacitor through diode - problems

Well, your first circuit had diodes in series with some of the capacitors with no discharge path shown, and that won't work.
If you are ref to the first circuit in the LTspice sim (post #2), yes then you are right it won't work (at least not reliably) that's what the sim shows. But that was how the IEEE paper suggested to do it and since they claimed it worked in their lab circuit, I adopted their design proposal.

And there is no discharge path shown, becauseat the moment the discharge is uninteresting if I can't charge the caps to start with. I think the discharge part will present a completely new set of problems if I manage to solve the charging problems.
 

Swend

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Hi Friends

I'm rephrasing my previous post as I maybe have not expressed myself clearly enough.

This is a standard topology for a SSMG take from this paper Solid stateBipolar Marx GeneratorTopologies: A Comparative study

Screenshot from 2019-06-18 12-38-44.png

The question is: How does C2 get charged? As you can see C2's charging path is from plus to minus (+) Ddc C2 Df1 (-).

I have made a simulation of it because I could not get it to work in my real life circuit, the diode Df1 (D2 in the sim) will not become forward biased, and neither will it in the sim. But people all over the world claim that it works, so why can't it work for me?

ltsim29.png
 

wwfeldman

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Swend

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you're circuit does not look like the Marx Generators I found on the internet

1) https://en.wikipedia.org/wiki/Marx_generator
2) https://www.instructables.com/id/Build-a-simple-Marx-Generator/
3) https://www.penguinslab.com/marx.htm


your circuit appears to be the charging model, Figure 3, from this site:
https://www.ijert.org/research/soli...ies-a-comparative-study-IJERTCONV3IS01033.pdf

i expect it will work if you build it per items 2 and 3 above.
Hi wwfeldman

Thank you for your input, but none of the proposed are solid state.
 

wwfeldman

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Hi Friends
The question is: How does C2 get charged? As you can see C2's charging path is from plus to minus (+) Ddc C2 Df1 (-).
View attachment 153794
C2 gets charged when switches Tdc, Ta1 and Te1 (in the schematic) are closed

When the power supply goes to 0 V at the end of the pulse, it looks like a short, NOT an open
by Kirchoff's law, the voltage across the capacitor get distributed across the other components.
the diodes are reverse biased, so there is no current flow
with one diode, all of the Vcap is Vdiode
with two diodes, Vcap is evenly split

so position C1 has voltage = Vcap - V diode, or what amounts to 1/2 V expected

use a differential probe across the capacitor, not a single ended probe relative to ground

I used LTspice to simulate, except I did not use an inductor.
I saw no inductors in the SSMG
i also did not find any differential probes, but you can change the probe to a reference

use the simulation software with an eye toward the basic stupidity of a computer program
you as the user need to be smart
 

Swend

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Hi Friend

C2 gets charged when switches Tdc, Ta1 and Te1 (in the schematic) are closed
I'm afraid it doesn't, neither in the sim nor in a real life circuit.

I saw no inductors in the SSMG
Here is one with inductors for your kind ref https://apps.dtic.mil/dtic/tr/fulltext/u2/a635206.pdf

Anyway, in the meantime I think I solved my problem by "pre-forward-biasing" the diode, at the cost of a additional galvanic isolated power supply, but it gets the job done the cap gets fully charged now.

Screenshot from 2019-06-18 15-31-29.png
 

wwfeldman

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@swend

its likely you know something i don't

but i think you're not understanding what LTSpice is telling you

When the power supply goes to 0 V at the end of the pulse, it looks like a short, NOT an open
by Kirchoff's law, the voltage across the capacitor get distributed across the other components.
the diodes are reverse biased, so there is no current flow
with one diode, all of the Vcap is Vdiode
with two diodes, Vcap is evenly split

so position C1 has voltage = Vcap - V diode, or what amounts to 1/2 V expected, since the diodes are identical.

use a differential probe across the capacitor, not a single ended probe relative to ground

the simulation software does what you tell it to do.
you need to understand how it works and what it does
and you need to interpret the out put appropriately

specifically, in post 7, the traces are Vc1
as you know, voltage is measured relative to some point
in all spice programs, unless otherwise specified, it is always the ground
that's why every spice program insists that you specify ground

with one diode, all of the voltage across the capacitor is across the reverse biased diode
with two (identical) diodes, half of the voltage across the capacitor is across each reverse biased diode

when you plot Vc1, it is relative to ground
with the second diode, you get half the voltage.
 
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Swend

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but i think you're not understanding what LTSpice is telling you
Yes you could easily be right about that I'm a LTspice noob. However the problem is that I do not fully understand what you are saying, first of all I'm not sure what circuit/measurement you are referencing in each paragraph, so please start with that it would help me a lot.

I do understand the part where you talk about C1 (in the sim) and differential probe, so here is the sim with a differential probe, and yes indeed the sim looks like it charging the cap.

Screenshot from 2019-06-18 20-01-27.png

But I can assure you it doesn't in the physical circuit, not without the "pre-forward-bias" (post #11). Please look at my post #1 and the D3 (D2 in the sim) trace with differential probe in the physical circuit - D3 never ever turns on, and that was the original problem.
 

FvM

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I try to understand what your simulation has to do with the post #1 circuit. I believe that the latter doesn't work as expected, but what do you exactly expect?

The imagined design problem in the post #2 simulation circuit has turned out as misunderstanding of Ltspice usage.

Furthermore I recognize only few similarities between the circuit quoted in #7 and your original circuit.

- - - Updated - - -

The full bipolar generator circuit is shown in Fig.2 respectively simplified Fig.9 of the quoted paper. It has little in common with circuit from the other paper, which needs a bipolar pulse to charge all four capacitors. The post #1 circuit looks like a correct implementation of the generator suggested in the paper. Unfortunately you don't clearly mark the output terminals, neither the paper does. I admit, it took me two minutes to understand where the output is.

Voltage across C6 with ref. to 0 (zero), now why can't this be like C4?
Now I see the similarity with your erroneous Ltspice simulation. Voltage across C6 simply can't be measured ground referenced, it must be measured differentially.
 

wwfeldman

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FvM's circuit requires a control that follows a pattern like:

s1 on s2 off
s1 and s2 on
s1 off S2 on
s1 and s2 on
repeat

the current in the inductor needs a path at all times

the only exception is if you know the current in the inductor goes to 0
before you turn off s1 or s2
 

FvM

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Yes. Fig. 3 in the paper linked in post #4 is a simplified schematic. You should review the original paper for related questions and more elaborated circuits. I was posting it solely for better understanding of post #1 and the problems raised about it.
 

Swend

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Now I see the similarity with your erroneous Ltspice simulation. Voltage across C6 simply can't be measured ground referenced, it must be measured differentially.
Yes that is also what wwfeldman noted previously. But does it matter? I mean I measured (post #1) voltage across D3 (DS3 in the simplified schematic in post #15) differentially, and it read 410mV and the datasheet says 1.7V - so D3 never turns on?
 

FvM

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I measured (post #1) voltage across D3 (DS3 in the simplified schematic in post #15) differentially, and it read 410mV and the datasheet says 1.7V - so D3 never turns on?
If D3 never turns on, how is C6 other terminal jumping to 600V? There's no other current path provided.

1.7V specification is for 1A diode current, you also have junction capacitance dynamically reducing the forward voltage. To see if C6 is charged, you'll measure its voltage with a differential probe.
 

Swend

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If D3 never turns on, how is C6 other terminal jumping to 600V? There's no other current path provided.
Well I thought anything is possible and I don't know everything, so perhaps it could be because the voltage presented itself on the other side of D2 (schematic in post #1) due to e.g. PCB creepage or perhaps evil spirits. In any case I was confused and frustrated.

1.7V specification is for 1A diode current, you also have junction capacitance dynamically reducing the forward voltage. To see if C6 is charged, you'll measure its voltage with a differential probe.
In the meantime I decided to dump the inductor and current return path circuitry, it reduces component count considerably and I have no need for the voltage boost as my power supply can easily reach +/-600V. And perhaps I will later charge both negative and positive simultaneously if it doesn't add too much complexity. Here is the differential C6 measurement (x100)
SDS00200.PNG

And here is the final output (x100), I'm missing 400V but I think it's because the caps have time to self-discharge a bit before Q4 (schematic in post #1) is switched on. Load is 100Kohm on the output btw.
SDS00199.PNG
 
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