dobts on SR flip flop???

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shash

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guyz after seeing this explanation on sr flip flop i have a doubt related to it,
how can a two input nand gate give output using only one input at a time?
 

**broken link removed**
guyz after seeing this explanation on sr flip flop i have a doubt related to it,
how can a two input nand gate give output using only one input at a time?

der r two inputs not one
 

intially there is no output so it only has one input
 

actually assume the outputs alternatively as 0 or 1 for both flip flops
 

no bro, its not like this,,
initially u have to give "high/low" to the previous output along with the X and Y(for the first time) i.e. Q then only you proceed ...
 

beyondH please can you elaborate a little more
 

i was asking you to please elaborate on your point
 

der is nothin to elaborate the reason u gav is correct. but ur question was on output so in my answer i specified abt output oly
 

**broken link removed**
guyz after seeing this explanation on sr flip flop i have a doubt related to it, ....

I'm not surprised that you have doubts, it's a very poor explanation - and the gates are incorrectly drawn too.

There must be dozens, if not hundreds, of better explanations on the web. Take a look at this one Digital Logic - Flip-Flops
 

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