Do you need to do post layout simulation for analog IC?

[Gireesh]

Post Layout Simulation

hi,

I want to know whther it is necessary to do post layout simulation for analog ic,if it has passed LVS checking?

Thanks in advance

 

[dgy99]

Re: Post Layout Simulation

hi,

I want to know whther it is necessary to do post layout simulation for analog ic,if it has passed LVS checking?

Thanks in advance

You must do it!!

Generally, parasitic component of Metal line (ex. Cap. Resistor) is not defined

in a library. In analog circuit, the parasitic make additional capacitor, resistor

(influence bandwidth and bias, crosstalk...).

The post simulation result might be not correct, it is the least method to prevent

teriible result for your chip.

 

[Gireesh]

Re: Post Layout Simulation

If post layout simulation has not to be carried out, then where shpuld we consider the efferct of parasitic elements likr parasitic capacitors, resistors etc.

 

[chippi]

Re: Post Layout Simulation

post lyt simulation are also done to see if there are any major timing variations ( rise time, fall time or propogation delays) due to the layout added parasitics, there should be less than 10% deviation, and its always better to do post lyt simulation to validate ur design again after lyt completion, as the LVS just tells u abt the interconnections.

 

[laglead]

Re: Post Layout Simulation

If post layout simulation has not to be carried out, then where shpuld we consider the efferct of parasitic elements likr parasitic capacitors, resistors etc.

Feedback loop is where you should pay attention to. e.g. amplifier compensation.
Another important is VCO in PLL.

 

[piao]

Post Layout Simulation

it depends on 2 things:

one is the SPEC for the circuit, the accuracy and the speed;

the other is if the vendor can provide this the parasitics for this flow.

 

[rajkumaru]

Re: Post Layout Simulation

Yes, you have to do. Otherwise how will you know that your circuit will work after fabrication. Post layout simulation is the scale of mesuring the precision of your layout

 

[mpkp123]

Re: Post Layout Simulation

Yes it is must to do the post layout simulation.
Because of ur layout being very neat it may not work properly as the parasitic in some path may increase.decrease the dalay on that path and the timings of the circuits and its response may effect.
another thing is the LVS only check the connectivity of the layout and dont give any info regarding the parasitic in any path so u must do the post layout simulation for checking its successful functioning.