nandam
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Hi,
I am in the confusion of using diodes for Antenna error correction.
For a PMOS gate,
1.When I put diode in nwell, the P-type is connected to the net and n-type to VDD(the well supply),
the charges (accumulated during fab) at the gate will forward bias the diode there by damaging the gate oxide connected to net.
2.For the same PMOS, I put diode in P-sub, the n-type is connected to the net and p-type to VSS(the sub supply).
During etching, the charges accumulated on the gate will reverse bias the diode, and there is no path for discharging of charges to sub.
Then how does it help.
The second point is confusing can anyone plz help me on this.
Thanks,
Nanda.
I am in the confusion of using diodes for Antenna error correction.
For a PMOS gate,
1.When I put diode in nwell, the P-type is connected to the net and n-type to VDD(the well supply),
the charges (accumulated during fab) at the gate will forward bias the diode there by damaging the gate oxide connected to net.
2.For the same PMOS, I put diode in P-sub, the n-type is connected to the net and p-type to VSS(the sub supply).
During etching, the charges accumulated on the gate will reverse bias the diode, and there is no path for discharging of charges to sub.
Then how does it help.
The second point is confusing can anyone plz help me on this.
Thanks,
Nanda.