Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Digital questions....can anyone solve these?

Status
Not open for further replies.

vlsitechnology

Full Member level 5
Joined
Nov 1, 2007
Messages
263
Helped
21
Reputation
42
Reaction score
14
Trophy points
1,298
Activity points
2,837
1) Design a circuit which will either substract x from y or y from x, depending on the value of a .If a=1, the output should be x-y, and if a=0, the output should be y-x.Use a 4 bit substractor and two 4bit 2to 1 mux?

2) Realize a full adder using a 3 to 8 line decoder and a)two or gates b)two norgates

 

Alkakkali

Junior Member level 2
Joined
Apr 24, 2007
Messages
20
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,281
Activity points
1,408
I will try to describe the solution for you because i did not have aready file to be downloaded.

The first multiplexer has inputs as (first four lines for x x3,x2,x1,x0) (second four lines for y y3,y2,y1,y0 ) respectively the selector connected to input a. the output of this mux is A A3,A2,A1,A0 which will be directed to the positive number of the subtractor circuit {remember to put the subtractor circuit to subtraction mode)

Thesecond multiplexer has inputs reversed as (first four lines for y y3,y2,y1,y0 ) (second four lines for x x3,x2,x1,x0 ) respectively the selector connected to input a. the output of this mux is B B3,B2,B1,B0 which will be directed to the Negative side or number of the subtractor circuit.

So it is done through your multiplexer depends on a multiplexer control signal select a.

Rashad

Added after 18 minutes:

For the second question:
the 3 to 8 decoder will have a three inputs A,B, Cin remember that Cin is the LSB and A is the MSB. then outputs will be eight lines 0,1,2,3,4,5,6,7
if you construct a truth table for the full adder circuit you will have:

A B Cin Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

now do the following for Sum find the lines for logic 1 and connect them through OR gate so lines 1,2,4,7 conected through OR gate for output SUM and lines 3,5,6,7 are to be connected to Carry output using OR gate.


Regarding Using NOR , I did not understand the reason for doing that. so can you explain why?

Added after 2 minutes:

I need points for downloading a file if you can help.

thank you
 

vlsitechnology

Full Member level 5
Joined
Nov 1, 2007
Messages
263
Helped
21
Reputation
42
Reaction score
14
Trophy points
1,298
Activity points
2,837
Can u please explain me y ur using 1,2,4,7 for ouput sum...and 3567 for output carry.........I am slightly getting confused...
Reply me
 

moore

Newbie level 2
Joined
Apr 22, 2008
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,291
for question1
1:solution
big = (a) ? x : y;
small = (a)? y : x;
result = big - small;
2:solution
result1 = x - y;
reslut2 = y - x;
result = (a) ? result1 : result2;

1,2 complie results are different.
 

Alkakkali

Junior Member level 2
Joined
Apr 24, 2007
Messages
20
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,281
Activity points
1,408
For this question , the numbers are the output of the decoders and usually numbered as 0 to 7 where output 0 will be either actve high or low when input ABC =000 and output 7 is actve when ABC=111. I don't know if you have a good background about decoders but any book in digital will help.


Regards

sory for replying late to your question
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top