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Digital filter RTL implementation

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willyboy19

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rtl code for digital filter

Hi, do you know any book or paper which describe the actual implementation (in either VHDL or Verilog) of a FIR/IIR digital filter? I don't need the signal-flow graph, but need some help on the actual RTL of the filter implementation.
 

tarkyss

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you can study the filter code on the opencore
 

zhustudio

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The RTL filter design is based on fixed number filter design, which can be realized by matlab and other tools, such as c/c++.
The main problem for the hardware implementation of the filter is the architecture and quantity noise. As we know, 1 bit can give 6dB SNR enhancement. So you must manage to get your system level requirement and then give algorithm in matlab or C/C++. Fixed the number and then write verilog code.
For filter architecture, you can see any digital filter design book. It will give basic FIR and IIR filter architecture for hardware implementation.

The key point of DSP in hardware is the algorithm design in matlab or call it fixed number design. Writing verilog is only a task of translating.
 

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