well the reason I asked about the widths was can you run a trace between the pads? or both traces between the corner pads?
I also wasn't saying the pad layout of the chip was bad, just that it should have been examined along with the connector to determine the correct placement of both the chip and the connector so the runs would not require crossing over each other, or at least you would know before hand that you would need a mitigating strategy (instead of finding out when the board is getting routed).
Regards