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Differential Amplifier

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engrgalvez21

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What could be the problem in this design? All MOS are in saturation but the Gain is dropping drastically. Bias current is 1uA.
 

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You seem to have blown up the device sizes a lot (vdsat is very low compared to vth) That might be causing lower bandwidth than what you might be expecting to see.
 

ou seem to have blown up the device sizes a lot (vdsat is very low compared to vth) That might be causing lower bandwidth than what you might be expecting to see.
Yes, try increasing Vdsat by decreasing W/L ratio.
 

A "drastic gain drop" over frequency can be expected anyway if you operate a MOSFET in common source circuit with ro as only real load. Presently we don't have even a remote idea which specification you want achieve.
 

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