differential amplifier gm/id method

[yefj]

Hello,In the curcuit bellow Iss is implemented by a current mirror.
We bias the curcuit so every transistr will be in saturation which is accomplished by imagining the voltage drop on every circuit.
then we need to set the gm of M2 and Rout of M4 and C_L to set the small signal response of gain and bandwidth.
I am used to do it by tweeking which is not an engenerring way.
Bellow we have a gm/Id VS Vov plot of my gpdk transistor .
But we have here voltage divider Rout from two transistors in parralel,i dont know how to accomlish these tasks with gm/id plot.
Could you please tell me the general direction how to design gain bandwidth and bias using gm/id?

 

[deep_sea]

Hi. This is a long story. Start by generating gm/ID charts for a single nmos transistor and the same for a pmos. You can set the VDS to a reasonable value (0.3 VDD - 0.5 VDD). Then sweep VGS as a primary variable from a value slightly less than Vth to (Vth + 0.5 V ) for example and "L" as parametric sweep. Then export your main parameters into excel or any other tool to draw them.
You should extract id, gm, vgs, gds. A sanity check for VGS sweep is that gm/ID range covers 5 S/A to 25 S/A.
Then you should plot all parameters vs gm/ID.
Now you have characterised your nmos and pmos devices and reached the state where you can start gm/ID design methodology.

 

[yefj]

i know i have to do the fllowing plots
1.gm/id vs id/W
2.gm/cgg vs gm/id
3.gm/gds vs gm/id

but in each one of those plots the gm/id id/W etc.. plot are by sweeping Vgs or Vds?
Thanks.

 

[deep_sea]

gm/ID is an indication of the biasing level of the device. So it is VGS which decides how the device is biased. The charts are generated at sufficiently large VDS to ensure saturation. After all, gds depends on VDS and the charts are generated at a certain VDS which causes your gds to be a bit different from expected but this is good to start with anyway.

 

[MahmoudHassan]

Please watch these lectures to understand gm/ID more