different capacitors and their purposes in PCB

[chinito]

I'm new to PCB stuff. I'm analyzing/debugging circuit and I am troubled by few caps and wonder why they are there and for what. Here's the list of caps I see in design. Please explain what are they for (in general):

C1 = 2200 pF
C2 = .1 pF
C3 = .01 pF
LC = ( 2200 nH || 7 pF ) this has two caps on the side 47 and 18 pF in external clock's path.

Any suggestion where can I get info on PCB design. Thanks in advance.

 

[andy1]

Try this book. It has an very good chapter on capacitors and how capacitors are used in PCB.



The 2200 nH || 7 pF combo is probably used to suppress higher harmonic osc from the clock.

 

[IanP]

Are you sure the values are correct?
I just can't imagine capacitance of 0.01pF (C3)?

 

[flatulent]

The second two pF are probably a typing error for nF. This would make the second two more in line with common practice.

Capacitors have series resonant frequencies with their lead inductances. Above this frequency they do not bypass well. By having several values in parallel they cover a wider frequency range.

 

[trend]

C1 = 2200 pF
C2 = .1 pF
C3 = .01 pF
LC = ( 2200 nH || 7 pF ) this has two caps on the side 47 and 18 pF in external clock's path.

Any suggestion where can I get info on PCB design. Thanks in advance.

Yeah.. the 2200pF is a cap to prevent brownouts
.1pf and .01pf should be to filter out spikes/noise (high frequencies)...

Also C2 and C3, are they in parallel? becuase they probably are decoupler caps (maybe even C1.. if it is parallel to the otehr 2).

I just asked a question that has a lot of relevence to yours:
**broken link removed**

Hope that helps
Lee

 

[crenyen]

The book what our dear friend suggest is really perfect.
I obtain many EMC concept from reading this text book.

 

[littlej]

Some paper say that several velues of capacitors in parallel will cause "aiti-resonance". Any comment about this. Thanks.

 

[kobik]

taken from si list
it is helpful to think about this in the frequency domain.

A tantalum capacitor of any size will reach its lowest impedance in the
1000's to 10,000's of Hz. It will support the PDS impedance out to a point
where the ceramic capacitor network takes over, typically between a few
hundred KHz to no more than 10MHz. At 10MHz the spreading inductance of a
plane pair even on a thick PCB is still quite low. As a result, we can
pretty much locate the bulk capacitors anywhere on the board that is
convenient as far as the IC load current is concerned. This usually makes
it a good idea to concentrate them close to the voltage regulator module.

Using a number of smaller capacitors rather than a few large capacitors can
result in a lower cost network due to the mounted inductance of the
devices. Spreading devices around is only useful if there is significant
spreading resistance. This should be evaluated on a design by design basis.

The VRM maintains a low impedance out to a frequency that varies widely by
the design of the VRM. A bypass network should be engineered and not
built by cookbook rules. That means you need to know how the VRM response
is defined, with or without a particular bulk capacitor. Then from your
requirements, you can synthesize the rest of the network.

Steve

 

[chinara]

What I want to append is the 0.1uf or 0.01uf capacitor could provide the current circle between power and Gnd for the AC. High speed digital signal will add noise to the power and gnd. So it require the capacitors.