What are the differences among the standard cell libraries that are used for gate level simulation, to support ATPG to ensure fault coverage, power models?
gate level model provides functionality and timing annotation.
ATPG model provides fault views.
Power model provides the power comsumption function of the inputs states.
1- fastscan used a .fs_lib, or .atpg file. Tetramax used a .tv very close to verilog language.
2- liberty could indicate the leakage and dynamic powers.
3- yes, the verilog describes the std cell gate level.