difference between RTL and Gate-level timing for combinational logic and wires

[tariq786]

Hi guys,

sorry for may be asking a simple question.

We know that for "Registers" in a design, the timing difference between RTL and Gate-level (timing) simulation cannot exceed the clock period minus the setup time because else there would be a setup time violation.

Now can we say the same thing about combinational logic wires? or is the delay between RTL and Gate-level (timing) simulation for combinational logic arbitrary?

Please educate me.

Thanks in advance.

 

[dftrtl]

Question is not clear

 

[tariq786]

What i mean to say is that gate-level timing signal will be delayed with respect to the RTL signal which has no delay.

This delay for register signals cannot cross one clock period - setup time. Please see the figure.




Here the first gate-level timing signal has a delay but this delay does not cause timing violation but the second gate-level timing signal has a delay such that it causes setup time violation.


Now can we say the same thing about combinational logic wires? or is the delay between RTL and Gate-level (timing) simulation for combinational logic arbitrary?

I am simply asking, is the same true for combinational signals in a design or does it only hold for register or sequential signals? As far as i remember, setup time and hold time terms are for registers or sequential circuit. If that is not true, please correct me

 

[dftrtl]

If I understand you question clearly, Here are my comments
1. In GLS every wire has delay
2. If you have sequential elements then you will have setup checks and hold checks.
3. STA will take care of sequential timing
4. GLS may not catch every timing failure. If some timing path is missed in STA and It is caught in GLS only by Luck if the testbench is such a way that you can get violation

 

[tariq786]

but dude referring to my original question, can combinatorial gate-level timing signals have arbitrary delays? or always less than one clock period?

 

[sakthikumaran87]

Hi i think you want to know whether the wire delays are same in RTL and GLS?? If my understanding is right then the answer is no.

 

[dftrtl]

Wire delays is want will decide whether you can meet setup or not for flop path.