Difference between RTL and behavioral code

[Thomson]

Re: RTL Vs Behavioral

Hi, all,

is there any book or website regarding behavioral modelling available?

TNX in advances.

Gerade

Pleae refer to Writing Testbenches. you can find it on this web.
in fact, software engineer and hardware engineers have different views on this topic. So if you really want to grasp this idea and methodology of constructing your test environment, please read some software books as well as hardware books.


Thomson

 

[naveen reddy]

Re: RTL Vs Behavioral

The main difference between RTL and Behavioral is that
the code which is written in RTL is synthesible
and the code written in Behavoiral may or may not be synthesible

RTL is technology or library dependant
Behavioral is completely library independent

No there are no tools for converting Behavioral to RTL

 

[vlsi_whiz]

Re: RTL Vs Behavioral

This is a highly debated topic... RTL Vs Behavioral!!! I dont think it depends on the perception of the design engineer.

A Register-Transfer Level (RTL) description specifies all of the registers in a design, and the combinational logic between. RTL descriptions are used for synchronous designs and describe the clock-by-clock behavior of the design.

Moreover RTL descriptions are easily synthesizable and give the intended results when using any Synthesis tool. Consider the following code snippet:


Entity CKT Is
Port (clock,din,en : in bit;
dout : out bit);
End CKT;

Architecture SYN of CKT Is
Component DFF
Port (Clk, din : in bit;
Q,Qb : out bit);
End Component;

Signal q1,q2,qb1,qb2 : bit;

Begin

R1 : DFF Port Map(clk,din,q1,qb1);
R2 : DFF Port Map(clk,din,q2,qb2);

dout <= q1 when en = '1' Else
q2;
End SYN;

In this, registers are instantiated using component instantiation statements for R1 and R2. Now, consider the following snippet:

Entity CKT Is
Port (clk,din,en : in bit;
dout : out bit);
End CKT;

Architecture RTL of CKT Is
Signal q1,q2 : bit;
Begin
Process
Begin

Wait untill clk'Event and clk='1';
q1<=din;
q2<=q1;

End Process;

dout <= q1 when en = '1' else q2;
End RTL;

In this, the registers are not instantiated but are inferred through the synthesis process.

Both the above are RTL descriptions since they both lead to registers and combinational blocks. The advantage of the second description is that it is not technology dependent. Whereas in the first one, the DFFs are instantiated from the technology library.

In the RTL designs estimation of the delays are difficult as it is an abstract level.

 

[blanket]

Re: RTL Vs Behavioral

RTL can be simulated and synthesized
Behavioral can only be simulated

By the virtue of its style and application, behavioral code tends to be simulated faster in a simulator than the corresponding RTL achieving the same function

There is no question of speed in silicion - because only RTL will see silicon!

 

[negreponte]

Re: RTL Vs Behavioral

every book in VHDL can help you in this question

 

[omara007]

Re: RTL Vs Behavioral

Behavioral Code may not be synthesizable .. just describing a certain system in terms of its behavior .. for example you can write a testbench in a behavioral way ..

RTL uses behavioral style and dataflow style (and sometimes structural) to describe SYNTHESIZABLE code ..

so , u r comparing orange to apple .. RTL is a synthesis prospective .. while behavioral is a descriptioni style prospective (not necessarly synthesizable or not).

 

[delay]

Re: RTL Vs Behavioral

Most designers refer to behavioral simulation for sequential/clocked designs (involving a process statement in VHDL e.g) describing a behavior or algorithm as opposed to RTL which defines data transfers from one module to another.

Another term for RTL is dataflow.

See the following link for detail and discussion.

 

[zhangpengyu]

RTL Vs Behavioral

RTL is register transist level, and it include datapath and fsm.

 

[sevid]

Re: RTL Vs Behavioral

Behavioral code may not be synthesizable,and it is of great use for system-level simulation,moreover,it may be synthesized to RTL code with behavioral compiler of Synopsys.

RTL code can be synthesized,and is time-based,describes dataflow between the registers and the combinational circuit between them.

 

[darylz]

RTL Vs Behavioral

actually, you should refter to the manual of synthesis tools to find what is accepted by it.

 

[laglead]

Re: RTL Vs Behavioral

I agree with arp.

Behavioral coding show how design works and RTL coding show how design is implemented in hardware.

 

[salma ali bakr]

Re: RTL Vs Behavioral

The main difference between RTL and Behavioral is that
the code which is written in RTL is synthesible
and the code written in Behavoiral may or may not be synthesible

RTL is technology or library dependant
Behavioral is completely library independent

No there are no tools for converting Behavioral to RTL

it can be converted from behavioral to RTL as sevid said: there is behavioral compiler of Synopsys

 

[shbakram]

Re: RTL Vs Behavioral

A hardware designer experienced enough can , after investigating a piece of code written in RTL style, can draw the corresponding block diagram, depicting how the code will get implemented in hardware...so the name...u can see how data flows thru the registers...now registers are interspersed with certain logical blocks so the making of block diagram from RTL code

Behavioral style code is good for functional/algorithmic correctness !

 

[omidkaveh]

Re: RTL Vs Behavioral

RTL is better than Behavioral
RTL code is compatible to SOC Encounter (with minimum cost)

 

[azerm]

RTL Vs Behavioral

Behavioral codes may be synthesizable or non-synthesizable. If you want to use tools like behavioral compiler to automatic scheduling and resource allocation, the code must be written with behavioral coding style.

I use in in some designs, the result is very interesting. But you must do an extra step, behavioral synthesis, which makes your behavioral to RTL. then you van synthesize the RTL code.

 

[madhavisai]

RTL Vs Behavioral

if u have any idea abt arcitecture then go for
rtl code,in behavioural entire module is treated as black box view.