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Difference between if and iff in system verilog

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daut

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I know that iff is used to disable assertions based on certain conditions and also used in cover-points to disable them. But why not use if instead of using iff?
 

FvM

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Paragraph 9.4.2.3 Conditional event controls in IEEE Std 1800-2012, the recent version of the language reference manual explains it very clear. The document can be freely downloaded at IEEE, so read it yourself.

"iff" is describing a gated clock with specific behaviour, you can't use "if" in this place. In terms of synthesizable HDL, it's the equivalent to a clock enable construct.
 

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