difference between generate sdc file in rtl compiler and hand written sdc file

[dha_synth]

hi folks,

I am working on the rtl compiler for 2 months but didt realise the actual difference between generate sdc file in rtl compiler and hand written sdc file which is used for the synthesis.

please differenctiate.

Thanks in advance

dha_synth

 

[rca]

Well the synthesis used an input file SDC hand written where the designer indicate the constraints, it is not mandatory, as RTL compiler for example has his own command to constraint the design.
using SDC is recommended and could be used by the majority of the synthesis tool.
Personally, I used as input of the place& route tool the generated SDC because the path, cell name has been updated during the synthesis and the SDC is align with the netlist.
Also in the SDC you could used the hierarchical pin which could disappear during the synthesis.