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Member level 2
Hi
When we extract a circuit by diva and assura we get different values for resistors (actual resistors, not parasitics) the difference is about 10-15%. and therefore there is a LVS error. for example:
Designed (layout) : 1K
extracted by Diva: 1.09K
extracted by Assura: 0.88K
Has anyone observed this and knows why?
When we extract a circuit by diva and assura we get different values for resistors (actual resistors, not parasitics) the difference is about 10-15%. and therefore there is a LVS error. for example:
Designed (layout) : 1K
extracted by Diva: 1.09K
extracted by Assura: 0.88K
Has anyone observed this and knows why?