Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

DFT compiler with multimodes

chis4yu

Newbie
Joined
May 23, 2020
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
57
Hi,

I have a dft setup where there are 8 blocks of logic to be scanned.

I was thinking of using

define_test_mode A0 -usage -scan -encoding {TEST[3] 0 TEST[2] 0 TEST[1] 0 TEST[0] 1}
. . .
and create the 8 test modes.

These 8 blocks will have one common scan input and one common scan output.

The output mux to scan out is already created in RTL.

Do I need to still define these 8 test modes and define 8 different test protocols
to use to build the scan chains ?

I have a dedicated scanclk input to each block and I have already inserted many muxes to bypass resets and gate clocks.

I just want to replace the scan flops and connect the output of the scan chain to the input of the mux.

What's the recommendations and any good small examples like even for 2 test modes ?

Thanks,

David
 

Toggle Sidebar

Part and Inventory Search


Welcome to EDABoard.com

Sponsor

Sponsor

Design Fast


×
Top