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[SOLVED] DFT Compiler: Clock pin not active when scan clock is on

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kungchuking

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The test_se signal is connected to the TE pin of my ICG cell. I already issued the command

set_dft_signal -view existing_dft -port test_se -type ScanEnable -active_state 1 -test_mode all

but the tool still treats the value of the test_se port as X.

1.png
2.png
 

Actually I set both existing and spec view. The following are constraints set on test_se
3.PNG
The existing_dft view is supposed to disable the clock-gating logic in scan-mode. But I don't know why it didn't work in this case?
 

existing_dft - means the connection of test_se already exist (before compile/insert_dft).
 
Thank you for your explanation. Now I know what existing_dft really means.

About the DRC error, it turns out that I had multiple test modes in my design. And I didn't specify one before running dft_drc. The problem was solved by issuing the command

current_test_mode INT_TEST
 

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