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devices mismatch in LVS check

Alex_Zhan

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Hello everyone, when I do LVS check in cadence, I find this problem in the picture. This layout can pass the DRC check, and I am sure the devices in the layout are the same as the ones in schematic.
Does anyone know the reason? Thank you deeply!
25.JPG
 

dick_freebird

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Like it says right up top, bad wiring.

Start probing layout nets attached to the device and
look for shorts, opens first. The problem may be at the
other end of the wire, not at the device named.
 

    Alex_Zhan

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Alex_Zhan

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Like it says right up top, bad wiring.

Start probing layout nets attached to the device and
look for shorts, opens first. The problem may be at the
other end of the wire, not at the device named.
Thank you sincerely, it does help me.
I solved this problem by checking the labels of the ports which connect these transistors in the layout.
 

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