Determination of ADC Linearity

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soumen21

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I have an ADC (LT1859) of 16 bit. Dynamic Input range is 0-10V. Datasheet species that a DNL of 4 LSB.
In my application I have masked last 4 bits. So can I say that DNL for my application is 0 LSB ? .
 

DNL will be never zero, because it describes the difference between the nominal and actual threshold levels. But it's clearly < 1.

Reducing the resolution from 16 to 12 bits divides the maximum DNL and INL numbers by 16 rather than 4, by the way. So you'll get a DNL of 0.25.
 
Thanks a lot for the info. Its really useful.
Do you have any application notes/white papers regarding this which can be read further ? or do you have any calculation for that ?
The same ADC is used for another application of mine with all 16 bits (no masking). Their I think we can consider a DNL of 4 LSB as given in datasheet ?
I have used TL034 before as a buffer before applying the input to ADC.
 
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