Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Details about WLM- Wire load Model

Status
Not open for further replies.

tarkyss

Full Member level 6
Full Member level 6
Joined
Aug 1, 2005
Messages
340
Helped
26
Reputation
52
Reaction score
8
Trophy points
1,298
Location
China
Activity points
4,162
wire load model

the function of wire load model is to estimate the interconnect delay
A wire load model describes wire load value according to the fan-out number of a net and the physical size of the block encloses the net
A wire load model consists of a set of wire load tables. Each table contains wire load data such as capacitance, resistance, and the average wire length for a series number of fan-out
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating

anan_tv

Junior Member level 1
Junior Member level 1
Joined
Nov 21, 2005
Messages
15
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Location
Bangalore - INDIA
Activity points
1,446
wire load models

haiii,

how does the WLM plays a role in Timing calculation????

If we change the WLM for a synthesis , then the timing calculations will differe or not???
 

tarkyss

Full Member level 6
Full Member level 6
Joined
Aug 1, 2005
Messages
340
Helped
26
Reputation
52
Reaction score
8
Trophy points
1,298
Location
China
Activity points
4,162
wire load table

normally, if you change WLM for a synthesis, the gate level netlist would be changed too, of the timing calculation will different too, as the process scalling, the interconnect delay is more and more important, so the effect maybe great.
as for VDSM process, WLM is not suitable now, so lots of other methods are provided
 

girishnathani9

Newbie level 4
Newbie level 4
Joined
Oct 18, 2007
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,311
delay wireload models

wire load models contain tables of

fanout vs load too
fanout vs resistance
fanout vs capacitance


can anyone explain me the basic difference between fanout and load ????
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top