jutek
Full Member level 4
hello
i want to design the comparator with nmos input pair and vdd=5V. I want the output to be 0.1V or 1V when input is lower or higher than reference.
How to ensure these levels?
regards
i want to design the comparator with nmos input pair and vdd=5V. I want the output to be 0.1V or 1V when input is lower or higher than reference.
How to ensure these levels?
regards