Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Design rules for library TSMC 0.18U CMOS 018 DEEP (6M, HV FET, S block)

Status
Not open for further replies.

rajrevanth61

Member level 3
Member level 3
Joined
Mar 6, 2014
Messages
65
Helped
0
Reputation
0
Reaction score
0
Trophy points
6
Visit site
Activity points
429
Hello all,

Normally the thumb rule followed in the 0.6u technology for the difusion length of an NMOS transistor is 3um+gate length. What is the thumb rule for diffusion length in TSMC 0.18u?
I am new to drawing of layouts using the TSMC 0.18U CMOS 018 DEEP (6M, HV FET, S block). previously i had been using 0.6u technology. where can i find the design rules for this TSMC 0.18u.


Please help me.



Thanks in advance
 

Hello Sir,

Thanks for the reply

The file you sent has three different technologies to use right. So for the library I am using i should be using DEEP technology right?
and I am new to the use of lambda scale so I am asking this. does
1 lambda in TSMC 0.18u CMOS018/DEEP (6M, HV FET, sblock) is equal to 0.09um?

Please help me
 
Last edited:

You can get all necessary info from MOSIS. Most info is accessible via their Internet presentation.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top