[SOLVED] Design Rule Error in Proteus Ares

Status
Not open for further replies.
M

mmaher22

Newbie level 1
Joined
May 26, 2016
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
8
Hello,

I have 2 simillar DRC Errors in Proteus Ares for two capacitors in my PCB the Error is

  • Violation type : "Pad-Pad"
  • Layer: Top
  • Actual Clearance: 9.56th
  • spec'd Clearance: 20th
  • Design Rule: Default

What is the meaning of this error and how it can be solved ?

Thanks in advance
 

The error is self explanatory: The DRC for pad-to-pad clearance is configured on tool as 20"th" but you drew them just 9.56"th" apart. You must move away the pads from each other.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…