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Design procedure for integrated MFB low pass filter

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Hi,

For example, if the BW of the input spectrum is limited to 1MHz and Fs=10MHz, then the least attenuated aliasing frequency is at 9MHz.
In my eyes:
The least attenuated frequency (that becomes aliased) is just above fs/2.
For fs = 10 MHz it is 5MHz + x
For example: 5001 Hz and it becomes aliased to 4999 Hz.

All input frequencies from 0....5000 Hz become converted without aliasing. Independent of bandwidth limiting.
Bandwidth limiting just reduces the amlitude of the frequencies above fc.
It has no influence on the frequencies.

Input frequency of fs becomes aliased to 0 Hz, in other words it will be seen as DC offset.

For designing an AAF, you need to decide the stop band attenuation at fs/2 not at fs.
Thus the AAF corner frequency needs to be lower than fs/2.

What am I missing?

Klaus
 
I think what we care about is converting the wanted frequency spectrum of the signal without substantial aliasing in band from junk frequency compnents. So, if the signal BW is, say up to 1MHz, then we don't care what happens at frequencies greater than 1MHz - for example those can be additionally filtered in digital domain if needed. In this case frequency at Fs-sigBW will be the frequency that aliases to 1MHz and it is also the least attenuated frequency from the anti-aliasing filter. Here is a picture of what I mean with few example frequencies, the signal BW and the filter transfer function.

Capture.PNG
 
Hi,

Now your picture makes it clear.
But then you don't need an AAF, which is on the analog side, but you need a digital bandwidth filter on the digital side.

Thank you for clarifying.

Klaus
 
It is probably a combination of both analog and digital filter. If you oversample a bit, then of course the analog filter becomes simpler. If you can't, and your signal bandwidth is close to Fs/2, then no luck, you need a good AAF.
 
If the used signal bandwidth is 1 MHz, you won't choose 5 MHz low pass cut-off. Rather something like below
4.th order Chebyshev I, 0.25dB ripple.

1594637396728.png
 
If the used signal bandwidth is 1 MHz, you won't choose 5 MHz low pass cut-off. Rather something like below
4.th order Chebyshev I, 0.25dB ripple.

This is correct, you don't have to choose 0.5Fs as you filter cut-off, but it doesn't change what I said about the least attenuated frequency that aliases back in baseband.
 
but it doesn't change what I said about the least attenuated frequency that aliases back in baseband.
Did anyone doubt? For the time being, the problem is that the OP didn't give useful signal bandwidth specifications. My example filter characteristic illustrates that you can't achieve more than 1 MHz useable signal bandwidth with 4th order filter if 80 dB suppression of aliasing components is intended. Depending on the application, an additional digital filter might be necessary to block the 1 to 5 MHz band.
 
Yes, of course. That's precisely why I chose 1MHz as an example signal BW.
 
Dear friends

Thank you for the explanation

I discussed the points with my leader and he will consider it for me, but any way he told me to start with MFB tobology

Attached you see please the second order of the circuit

As Suta mentioned before, the GBW should be at least 100 MHz to cover 5 MHz signal with gain equal to one

As a first step is to design the Op-Amp or the equivelant model, I want to test it with a load equal to the feedback network, so please what is the equivalent total RL and CL in the output of the opamp

and also please what is the equivelant Rin and Cin, this will be useful to know if the previous stage is able to drive it the filter input stage

Thank you once again
 

Attachments

  • filter2.jpg
    filter2.jpg
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If you are asking for values of resistors and capacitors in the filter, the only person who know the answer are you :)

The type of filter and its cut-off frequency gives your a numbers for RC products in AAF.
What values of particular elements are optimal, depends to your design constraints, like minimum input impedance, maximum output impedance, input equivalent noises and so on.
Moreover, you are the only person who know what guy is driving AAF input and what are the parameters of ADC loading it.

So, reverse your question: what is minimum input impedance which can be driven by predeceasing stage and maximum output impedance which can drive ADC?
 
If you are asking for values of resistors and capacitors in the filter, the only person who know the answer are you :)

The type of filter and its cut-off frequency gives your a numbers for RC products in AAF.
What values of particular elements are optimal, depends to your design constraints, like minimum input impedance, maximum output impedance, input equivalent noises and so on.
Moreover, you are the only person who know what guy is driving AAF input and what are the parameters of ADC loading it.

So, reverse your question: what is minimum input impedance which can be driven by predeceasing stage and maximum output impedance which can drive ADC?
Dear Dominik

Thank you for your reply

Indeed I was not clear in my post, I didn't mean how much values of resistors or capacitor I need for the AFF, as you said only after designing I will know it :)

I ment effective load equation in terms of the feedback resistor

for example Ro1 = R02 = R2a + R1a || R2a
Also for Co1 & Co2

The same for Rin1 & Rin2, Cin1 & Cin2,

In the design procedure, I will calculate the required feedback elements, then I will design the opamp afterward. As you know for op-amp design I need to design with the same load condition.

For the input side might not be critical for the opamp of the filter but I want to consider it for the previous stage

I hope I made it more clear, and thank you once again
 

Dear friends

Thank you for your very helpful discussion in this topic

The GBW of the used op-amp to realize the filter should be at least 20 times bigger the cutoff frequency of the filter (Analog Filter book),

For the slew rate, I will design the opamp so to cover the full power bandwidth of the signal at maximum swing

is there any rule for the open-loop gain of the amplifier? or just the general rule to have open loop gain more than 60 for accurate closed loop operation

Thank you once again
 

Open loop gain of the amplifier limits the integrators response at low frequencies and has the effect to de-Q the filter poles. Try to simulate with an op-amp model and see how much open-loop gain at DC you need.
 
Open loop gain of the amplifier limits the integrators response at low frequencies and has the effect to de-Q the filter poles. Try to simulate with an op-amp model and see how much open-loop gain at DC you need.

Thank you Suta for your reply

You are right, but I am looking for general rule of thump to say about it, like the general rule of thumb of the GBW has to be 20 times bigger than fc, there must be rough rule for the gain as well
 

In a bi-quad stage the Q of the poles is approximately Qactual ~ Qideal(1-2Qideal/Ao)
 
I presume Ao in this expression is the gain at the pole frequency rather than low frequency gain. Respectively it's quite meaningless to request a particular DC gain as long as you don't know the ratio between OP first pole frequency and filter pole frequency.

There's always too little margin to consider the OP as ideal in a high frequency active filter. You better design the filter with real OP parameters from the start. Filter stability when faced with OP transfer characteristic variations is the practical design limit then.
 
Ao is the DC gain but ultimately things boil down to the ratio between the dominant pole of the opamp and the pole of the filter. The farther the filter pole frequency is from the dominant pole of the opamp, the closer the phase shift of the integrator is to 90deg and we usually design filters assuming ideal integrators. It is the phase shifts in the filter that distorts the filter's response and that's why we try to push both the unity gain frequency and the dominant pole of the opamp further away from the frequency range where we need good integrator behavior. At least this is my understanding of this matter.
 
Dear friends,

Thank you for your reply,

I found a source explaining the same of your answer. Please see the attached image

The opamp GBW should be >> cutoff frequency of the filter, for sure I am referring to a stable op-amp with good phase margin to assure the first non dominant pole is safely far from GBW.

for the lower part frequency of the integrator, and as you see from the picture, higher DC gain will help to reduce the dominant pole frequency of the op-amp. By decreasing the latter one and increasing the GBW we could reach to a miximum region of integration where the phase shift is 90 as also Suta said.

Upon that I think Increasing A0 is specially important when R & C are small for the case of high cutoff frequency filter.

integrator.PNG
 

Consider two OPs with equal GBW and different A0, hence different A0 corner frequency. For frequencies e.g. factor 10 above the A0 corner frequency, A0 has no significant effect on the filter characteristic.
 

    Junus2012

    Points: 2
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No, it doesn't, but what is the actual phase for a frequency 10x aove the dominant pole? It is close to 90deg but not 90deg yet. For good filter responce, and here I'm talking about high-Q filter poles, phase error of just couple of degrees is already modifying the expected filter characteristic.
 

    Junus2012

    Points: 2
    Helpful Answer Positive Rating
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