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Design Phase locked loop

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entsecy

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Can anyone tell me how to make a pll ciruit
I have to design it
PLEASE HELP!!!!!
 

crutschow

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As usual, not near enough info.

Is this a digital loop or analog loop?
What is the frequency range and voltage range?
Can you use integrated circuits in the design?
Is this homework?
 

nonso

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hi crutschow, i am working on the same thing. mine can be both analog and digital. the block diagram consist of local oscillator, PFD, charge pump, filter and VCO. the output frequency is targeted at 1000MHz. I intend to use CE colpitts oscillator to realise the VCO. please i need help. your help will be appreciated.
 

albbg

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hi crutschow, i am working on the same thing. mine can be both analog and digital. the block diagram consist of local oscillator, PFD, charge pump, filter and VCO. the output frequency is targeted at 1000MHz. I intend to use CE colpitts oscillator to realise the VCO. please i need help. your help will be appreciated.

Your specs are not clear enough to me. You said that your PLL can be either analog or digital, but the explained block diagram seems that of an analog PLL. As already asked by crutschow: Is it a homework ? Why don't use one of the off-the-shelf IC component (there exist also with integrated VCO) ?
 

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