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Design of Buffer for TIA in CMOS with RGC

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awan

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Design of Buffer for TIA

Hi;

I have designed a wideband TIA in CMOS with RGC. But i need to drive a 50 Ohm load with it.

The buffer need to have a high gm value otherwise the gain is killed. Having high gm adds to lot of parasitics and limits the bandwdth. Could someone please help me with the design of a buffer in multi stages such that it dosesnt kill the gain and bandwidth.

Thanks
 

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